Cerebras’s giant chip will smash deep learning’s speed barrier • Hacker News Board

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#21

Post by wpietri » Thu, Jan 02, 2020, 7:48 PM UTC

atq2119 wrote: post #18

green-eclipse wrote: post #14

The Cerebras chip really stands out in terms of the chip industry's relationship to Moore's law. Look at the graphs in this article for reference: https://medium.com/predict/cerebras-trounces-moores-law-with...

That article is hogwash. Sure, the Cerebras "chip" is impressive. But the idea that it will accelerate Moore's law and usher in the singularity is just nonsense. Nobody has even made serious efforts to use deep learning for physical design, and its scope for improving designs is limited at best even in theory. If this was trying to aim at solid state physics and materials research, then maybe one could be carefully o…

Agreed. One of the things that fascinates me about technology is how the new thing is always treated as magic. I'm hoping we're almost out of that phase for ML, as the hype is exhausting.

And for the curious, a good example of this is radium. For a while it was a miracle cure-all, put in everything from lipstick to jock straps. That did not work out well: https://www.theatlantic.com/health/archive/2013/03/how-we-re...

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#22

Post by m0zg » Thu, Jan 02, 2020, 7:49 PM UTC

They did build some valuable tech, no question there, but be sure to account for the typical startup hyperbole. By the time you can get your hands on this (if that ever happens), the hyperbole will converge a bit closer to reality, the tradeoffs will become apparent, etc, and you'll discover that it is not, in fact, going to "smash" barriers of any kind in any practical sense.

From TFA: "Cerebras hasn’t released MLPerf results or any other independently verifiable apples-to-apples comparisons."

That's all you really need to know.

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#23

Post by [deleted] » Thu, Jan 02, 2020, 7:50 PM UTC

wbhart wrote: post #20

From the perspective of an outsider, I can't see how a company like this could survive. They claim on the one hand to have done something really amazing and are at the stage where they are looking for customers. Normally, you'd expect them to be touting performance figures to secure such investment. Instead, they've decided to keep the performance secret. And they've managed to find some "expert" who says this is nor…

[deleted]

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#24

Post by agoodthrowaway » Thu, Jan 02, 2020, 7:51 PM UTC

frankchn wrote: post #19

Zenst wrote: post #2

A chip that size, imagine the yield. Equally, cooling - has to be water based as a heatsink that size would be on par to a small anvil and the weight factor would be some serious issues. Though unsure as no pictures of it in-play alas and all they say is - "20 kilowatts being consumed by each blew out into the Silicon Valley streets through a hole cut into the wall", which does somewhat beg for a picture as just rais…

Chiplet designs means that you still have to route signals either onto an interposer or onto a PCB. If you have a silicon interposer you have the same issue of making a really large silicon die. If you route into the PCB, then you may need SerDes depending on what you do and bandwidth will be lower and latency will be higher due to signal integrity issues. Maybe something like Intel's EMIB technology where they have…

The future of these interconnects is to make them optical. Once the interconnects are optical lots of problems get solved. Chips don’t have to be in same enclosure, simplifying cooking etc.

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#25

Post by phonon » Thu, Jan 02, 2020, 7:54 PM UTC

wbhart wrote: post #20

From the perspective of an outsider, I can't see how a company like this could survive. They claim on the one hand to have done something really amazing and are at the stage where they are looking for customers. Normally, you'd expect them to be touting performance figures to secure such investment. Instead, they've decided to keep the performance secret. And they've managed to find some "expert" who says this is nor…

There are probably only a few hundred prospective customers. (Some may buy several units). Each unit will cost millions. They can discuss the expected workloads/performance with each prospective customer individually.

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#26

Post by jandrese » Thu, Jan 02, 2020, 7:54 PM UTC

wbhart wrote: post #20

From the perspective of an outsider, I can't see how a company like this could survive. They claim on the one hand to have done something really amazing and are at the stage where they are looking for customers. Normally, you'd expect them to be touting performance figures to secure such investment. Instead, they've decided to keep the performance secret. And they've managed to find some "expert" who says this is nor…

Keeping the performance figures a secret is a red flag on the level of "run, don't walk, away from this company".

At best their solution is on par with GPUs in a performance per watt/dollar sense. At worst they're scammers looking for a sucker.

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#27

Post by whatshisface » Thu, Jan 02, 2020, 8:00 PM UTC

gimmeThaBeet wrote: post #11

Zenst wrote: post #2

A chip that size, imagine the yield. Equally, cooling - has to be water based as a heatsink that size would be on par to a small anvil and the weight factor would be some serious issues. Though unsure as no pictures of it in-play alas and all they say is - "20 kilowatts being consumed by each blew out into the Silicon Valley streets through a hole cut into the wall", which does somewhat beg for a picture as just rais…

I'm really curious about the benefits of their implementation. It's far beyond my grasp to make any serious criticisms and I don't really want to doubt them, it just seems a pretty radical departure from even the direction of innovation. The way they paint it sounds like they're putting in redundant cores to account for failure of what seems like what I would call the 'first line' cores, i.e. there's cores that are o…

The article claims that keeping everything on one die raises interconnect bandwidths and lowers latencies over what would be possible in a conventional supercomputing setup. Connections are made over the silicon that is normally left aside for cutting the chips apart. Apparently that is a special process that they had to collaborate with a partner in order to get working.

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#28

Post by ajtulloch » Thu, Jan 02, 2020, 8:02 PM UTC

bcatanzaro wrote: post #5

Reminds me of that other great prediction of a GPU killer from IEEE Spectrum back in 2009: https://spectrum.ieee.org/computing/software/winner-multicor...

For the folks who are downvoting this comment, the author is absolutely a subject matter expert (and completely correct).

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#29

Post by phonon » Thu, Jan 02, 2020, 8:05 PM UTC

gimmeThaBeet wrote: post #11

Zenst wrote: post #2

A chip that size, imagine the yield. Equally, cooling - has to be water based as a heatsink that size would be on par to a small anvil and the weight factor would be some serious issues. Though unsure as no pictures of it in-play alas and all they say is - "20 kilowatts being consumed by each blew out into the Silicon Valley streets through a hole cut into the wall", which does somewhat beg for a picture as just rais…

I'm really curious about the benefits of their implementation. It's far beyond my grasp to make any serious criticisms and I don't really want to doubt them, it just seems a pretty radical departure from even the direction of innovation. The way they paint it sounds like they're putting in redundant cores to account for failure of what seems like what I would call the 'first line' cores, i.e. there's cores that are o…

The CEO says 1-1.5%.

"Cerebras approached the problem using redundancy by adding extra cores throughout the chip that would be used as backup in the event that an error appeared in that core’s neighborhood on the wafer. “You have to hold only 1%, 1.5% of these guys aside,” Feldman explained to me. Leaving extra cores allows the chip to essentially self-heal, routing around the lithography error and making a whole-wafer silicon chip viable."

https://techcrunch.com/2019/08/19/the-five-technical-challen...

Re: Cerebras’s giant chip will smash deep learning’s speed barrier

#30

Post by Zenst » Thu, Jan 02, 2020, 8:08 PM UTC

luma wrote: post #17

Zenst wrote: post #13

Earlier quoted context omitted.

Wow, that really does add some perspective upon the cooling and the aspect about power requirements datacenter wise really does highlight how out-there these type of systems are over the usual rack layouts. Equally, the cooling capacity of the datacenter comes into play with such systems. Given the power density, the amount of heat being generated would equally be above your normal rack output.

In most cases the cooling capacity is in fact the actual limit you are running up against. Getting more power into a rack is a simple matter of running more cable. Getting more power _out_ of the rack is a much more complicated issue to resolve.

Yes the whole getting more power into a datacenter is much easier to add than the extra cooling capacity to remove that power once it has transitioned into heat. But I'd imagine they would plan and monitor that aspect and may even have redundant cooling systems. But certainly a potential gotcha and one that would soon sort out the bad datacenters when they end up seeing all there hosting overheat and offline.