ZRNA – Software-defined analog circuits • Hacker News Board

Re: ZRNA – Software-defined analog circuits

#21

Post by theon144 » Thu, Aug 01, 2019, 2:45 PM UTC

raverbashing wrote: post #18

theon144 wrote: post #11

Earlier quoted context omitted.

>The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz). I am not sure what this implies; would you be able to build an equivalent, digital circuit (with presumably a ADC and a DAC stage) with an average AVR then? Or what's the clock comparison for?

The unit gain (for an OpAmp at least) is related to the bandwidth, the gain decreases linearly (in the dB scale) as the frequency goes up. You want to be looking at the -3dB range to know +/- the actual useful bandwidth

Okay, but I'm still confused as to why would you compare it to AVR frequency; was that just a random comparison ("this car goes so slow you could outrun it") or would the frequency of a MCU clock being higher than the bandwidth of an op amp ever be important?

Re: ZRNA – Software-defined analog circuits

#22

Post by raverbashing » Thu, Aug 01, 2019, 3:07 PM UTC

theon144 wrote: post #21

raverbashing wrote: post #18

Earlier quoted context omitted.

The unit gain (for an OpAmp at least) is related to the bandwidth, the gain decreases linearly (in the dB scale) as the frequency goes up. You want to be looking at the -3dB range to know +/- the actual useful bandwidth

Okay, but I'm still confused as to why would you compare it to AVR frequency; was that just a random comparison ("this car goes so slow you could outrun it") or would the frequency of a MCU clock being higher than the bandwidth of an op amp ever be important?

Correct, the comparison makes no sense

> would the frequency of a MCU clock being higher than the bandwidth of an op amp ever be important

Unless you specifically want to capture the analog waveform of the clock signal of that processor, it is unimportant

Re: ZRNA – Software-defined analog circuits

#23

Post by anfractuosity » Thu, Aug 01, 2019, 5:40 PM UTC

I bought some of the Anadigm FPAAs a while ago, I need to get round to using them, one thing to note though is they seem to use the discrete time style circuit, so they actually switch at a high frequency between different capacitors to generate a filter.

Re: ZRNA – Software-defined analog circuits

#24

Post by lpmay » Fri, Aug 02, 2019, 8:17 AM UTC

pjc50 wrote: post #12

lpmay wrote: post #10

Earlier quoted context omitted.

Sure, but analog processing happens continuously and at an SNR that is equivalent to a very high bit depth. If you had an analog processing chain with 18MHz of BW (which granted you'd need somewhat more GBP), that would be more akin to a digital system that can produce output samples at 40Msps+. If each output sample needed even just a few dozen processing clocks to compute, you're already looking at a 500MHz+ clock.…

> analog processing happens continuously and at an SNR that is equivalent to a very high bit depth 16 bits is roughly 100dB, and achieving more than that is usually a serious engineering challenge. I'd like to see crosstalk rejection numbers for this system. There are people working in the other direction, trying to use analogue for implementing the calculations of neural nets, and they tend to target the equivalent…

Yes, but I don't think your refuted my point. 16 bits (96dB SNR) is pretty good for an 18MHz signal processing system. Comparing it to a 18MHz 8bit AVR with a 10bit, 15ksps ADC is probably missing what makes this potentially cool.

Don't get me wrong, I think this is a pretty niche thing that doesn't have a lot of applications. DSP is great, and it's not going to get overthrown anytime soon. But if you were looking for things that make signal processing in the analog domain exciting to think about, I stand by high equivalent bit depth for the processing bandwidth and power consumed as a valid advantage.

Re: ZRNA – Software-defined analog circuits

#25

Post by jmpz » Fri, Aug 02, 2019, 5:12 PM UTC

anfractuosity wrote: post #23

I bought some of the Anadigm FPAAs a while ago, I need to get round to using them, one thing to note though is they seem to use the discrete time style circuit, so they actually switch at a high frequency between different capacitors to generate a filter.

Can you say a little more about this? Would that negate some of the benefit of this?

Re: ZRNA – Software-defined analog circuits

#26

Post by urklang » Fri, Aug 02, 2019, 6:43 PM UTC

jmpz wrote: post #25

anfractuosity wrote: post #23

I bought some of the Anadigm FPAAs a while ago, I need to get round to using them, one thing to note though is they seem to use the discrete time style circuit, so they actually switch at a high frequency between different capacitors to generate a filter.

Can you say a little more about this? Would that negate some of the benefit of this?

The Anadigm FPAA implementation is built on switched-capacitor circuits. See https://en.wikipedia.org/wiki/Switched_capacitor. Alternative FPAA implementations exist, but are not yet commercially available. See RASP from Georgia Tech: http://hasler.ece.gatech.edu/Published_papers/FPAA_Papers/.