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Earlier quoted context omitted.
AMD has to choose a process years before that process goes into production, so there's a lot of risk that production could get delayed or yields could be poor. AMD could choose TSMC then discover later that Samsung would have been better.
btw, what happened to GF ?
Earlier quoted context omitted.
Those aren’t forgone conclusions. That’s just guesswork on a whiteboard roadmap. At 10nm we are already at a stage where quantum effects start to dominate, and it’s not clear how much further these classical effects can scale. 7nm was “a process too far” for Intel, and it is a bit of a miracle that TSMC managed to pull it off.
5nm isn't just on a whiteboard, it's in risk production already at TSMC. Volume production is slated for Q1 2020, less than a year away, and TSMC tend to be accurate with their estimates.
I hate when acronyms prevent people from understanding important parts of an article. Here you go. TSMC = "Taiwan Semiconductor Manufacturing Company, Limited, also known as Taiwan Semiconductor, is the world's largest dedicated independent semiconductor foundry" (from Wikipedia).
> by our estimate TSMC will be a "full node" ahead of both Intel and Samsung How times have changed! I still vividly remember Intel being a full node ahead of everyone else with their release of 22nm node. For example, see this article from 2012: https://www.extremetech.com/computing/127987-deliberate-exce... This too shall pass.
Vividly remember, I was reading this and assuming it is going to be way back.... 22nm and 2012 really wasn't that long ago :D
Intel has had the processing node leads on CPU since the 90s. I vividly remember Pentium were always at least one year ahead of AMD. That was the Pentium, Pentium MMX .... Not quite sure if it was the case in 386 / 486 era.
I remember 180nm was already in AMD Athlon era, so it was likely in 2xx nm or 3xx nm.
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5nm isn't just on a whiteboard, it's in risk production already at TSMC. Volume production is slated for Q1 2020, less than a year away, and TSMC tend to be accurate with their estimates.
I hope you're right, but it's hard to imagine they aren't going to hit an unexpected wall at some point. The question is where is the wall? Basically you can never predict and unknown unknown.
5nm started risk production were direct from TSMC report. They are expecting even faster ramp than 7nm. And TSMC has a history of being very conservative.
Their approach has been iteration rather than a leap like Intel did. And you can bet it will arrive on scheduled for next year's Apple iPhone.
There are roadmap, tools, technique for 3nm ( As explained in the Article ) and even 2nm. So none of these are pipe dreams. As long as these customers can keep paying top dollar to be on leading node, TSMC seems to have no problem with innovating. The question is when will these clients slow down and stop paying every year because leading node is too expensive. Basically the cost of designing leading node is doubling every two year. So we are seeing something like the inverse of Moore's Law.
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Yes, although there was an element of luck that Intel 10 nm failed at the same time that TSMC 7 nm came out smoothly. The opposite situation happened back at 32 nm and could happen again.
yeah but how many nm are left? There's a phsyical limit to transistor size!
Earlier quoted context omitted.
Yes, although there was an element of luck that Intel 10 nm failed at the same time that TSMC 7 nm came out smoothly. The opposite situation happened back at 32 nm and could happen again.
yeah but how many nm are left? There's a phsyical limit to transistor size!
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7 -> 7+/P -> 5 -> 5+/P -> 3 are all in the works already and that's just TMSC
Those aren’t forgone conclusions. That’s just guesswork on a whiteboard roadmap. At 10nm we are already at a stage where quantum effects start to dominate, and it’s not clear how much further these classical effects can scale. 7nm was “a process too far” for Intel, and it is a bit of a miracle that TSMC managed to pull it off.
But anyway, undesirable quantum effects have been problematic for almost a decade, and were overcome with a variety of techniques (inc FinFET).
Earlier quoted context omitted.
Those aren’t forgone conclusions. That’s just guesswork on a whiteboard roadmap. At 10nm we are already at a stage where quantum effects start to dominate, and it’s not clear how much further these classical effects can scale. 7nm was “a process too far” for Intel, and it is a bit of a miracle that TSMC managed to pull it off.
5nm isn't just on a whiteboard, it's in risk production already at TSMC. Volume production is slated for Q1 2020, less than a year away, and TSMC tend to be accurate with their estimates.
Earlier quoted context omitted.
Those aren’t forgone conclusions. That’s just guesswork on a whiteboard roadmap. At 10nm we are already at a stage where quantum effects start to dominate, and it’s not clear how much further these classical effects can scale. 7nm was “a process too far” for Intel, and it is a bit of a miracle that TSMC managed to pull it off.
I think an important difference is that EUV exists now.
[0]: Higher frequency UV light is more tightly focused, but also imparts more energy. At some point the blasting power of a single photon does damage on a scale larger than the wavelengths involved, at which point EUV will take you no further.