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Liberouter Combo Cards – FPGA boards focused on network data processing

liberouter.org

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Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#21
post #10

There was an article at Ars [1] that explained how Microsoft uses FPGA powered network cards at Azure. The idea is to move "network decision making" (load balancing; maybe firewalls and other assorted stuff) from the CPU to the FPGA, where this kind of thing can be done faster, and more reliably (e.g. you can have hard timing constraints on a FPGA). Guess the other players in this field are pure software switches, wh…

I always thought the "best-practice" architecture for these sort of high-speed SDN switches was to have a custom ASIC "data plane" (hard realtime) that can be signalled from a CPU "control plane" (running something soft realtime like Erlang.)

Would an FPGA really give advantages over such a setup? I can't imagine it'd beat the CPU at being a control plane—so it'd mostly have to be that it has a lower TCO as a data plane than an ASIC. That might be true, if the code in the data-plane would ever need updates (which, for ASICs, mean new hardware revs.)

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#22
I wondered if an FPGA approach would be worth it now that Intel has their DPDK approach.

Searched a bit, and found a terrific comparison of doing the same work three different ways. It compares serving up a Key/Value store using traditional software, then DPDK, then an FPGA based approach: http://www.hoti.org/hoti23/slides/lockwood.pdf

Skip to slide 22 if you're impatient.

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#23
post #21
post #10

There was an article at Ars [1] that explained how Microsoft uses FPGA powered network cards at Azure. The idea is to move "network decision making" (load balancing; maybe firewalls and other assorted stuff) from the CPU to the FPGA, where this kind of thing can be done faster, and more reliably (e.g. you can have hard timing constraints on a FPGA). Guess the other players in this field are pure software switches, wh…

I always thought the "best-practice" architecture for these sort of high-speed SDN switches was to have a custom ASIC "data plane" (hard realtime) that can be signalled from a CPU "control plane" (running something soft realtime like Erlang.) Would an FPGA really give advantages over such a setup? I can't imagine it'd beat the CPU at being a control plane—so it'd mostly have to be that it has a lower TCO as a data pl…

Yeah, it would have an advantage: you could deploy it without spending hundreds of thousands of dollars on ASIC production or prototyping. It's the main use for FPGA's. They're better so long as unit price is cheaper than masks and such for ASIC's.

In this case, each customer would have a relatively small number of the switches where volume doesn't justify an ASIC. Might be enough switches & customers to justify licensing a FPGA core with development cost spread out among many customers.

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#24
post #7

Looks like we hugged them to death. Here's the Wayback Machine's most recently cached copy of the page: http://web.archive.org/web/20160604121207/https://www.libero...

Having recently tried to read a lot of old-ish research (10 years maybe, that's old for malware research), I really appreciate the value of the Wayback machine / Archive.org team. Donated €15 at some point just to feel a little better and will decide on another donation later. Was about to post the same link!

Wayback Machine is so critical it should get public funding. It may already but stuff should be in the Congressional Budget. Leave control of it where it is, though.

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#25

Earlier quoted context omitted.

Generally speaking, FPGAs are for building hardware pipelines with fixed throughput and finite state machines to control things. If your first thought is "Linux", you're almost certainly better off with an off the shelf SoC. If you have a well understood problem (say, filtering packets based on a handful of patterns), you would design a filtering pipeline that would connect between two Ethernet MACs, applying the fil…

The "connecting two ethernet MACs [with] filtering" seems like an interesting project. I guess a "simple" (and possibly useless) idea could be to do filtering based on MAC addresses in the enthernet frame. Is there open IP for this? I guess I'm asking how a hobbyist gets into this :-) If anyone knows of an existing project, I'd appreciate a pointer.

Add MACsec while you're at it to immunize you against attacks involving taps or a subset of compromised Ethernet NIC's. Well, a subset of it maybe as it got complicated like some other standards.

https://www.juniper.net/documentation/en_US/junos15.1/topics...

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#26
post #21

Earlier quoted context omitted.

I always thought the "best-practice" architecture for these sort of high-speed SDN switches was to have a custom ASIC "data plane" (hard realtime) that can be signalled from a CPU "control plane" (running something soft realtime like Erlang.) Would an FPGA really give advantages over such a setup? I can't imagine it'd beat the CPU at being a control plane—so it'd mostly have to be that it has a lower TCO as a data pl…

Yeah, it would have an advantage: you could deploy it without spending hundreds of thousands of dollars on ASIC production or prototyping. It's the main use for FPGA's. They're better so long as unit price is cheaper than masks and such for ASIC's. In this case, each customer would have a relatively small number of the switches where volume doesn't justify an ASIC. Might be enough switches & customers to justify lice…

Alternatively you can also re-configure the FPGA for specific loads where ASIC is always fixed. Downside is of course lower speed and higher power consumption.

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#27

I saw the page via wayback machine since the site was down at the time. Seems like a cool academic project. I've been getting into FPGAs personally, with this exact application in mind. I've been really stymied by how to process packets in hardware. The obvious approach seems to be to run an RTOS or even full-fledged linux if your FPGA has hard IP cores on it. But is there a better way? How much performance would one…

Dont be fooled by the appearance of VHDL/Verilog. you are building hardware with them. So writing a TCP/IP stack in VHDL would be almost like physically building a TCP/IP stack with physical logic gate IC's. I looked into this a few years ago. If you can settle for just sending bytes on an ethernet cable, you can relatively easily TX/RX using UDP Multicast. The FPGA can beam bits straight to the PHY adapter and out t…

> you are building hardware with them

Actually, not quite, not with FPGA. Sure, you can use an HDL to synthesize a custom microchip, in which case you indeed would be "building hardware", but you can also target an FPGA specifically, in which case you would essentially be programming a kind of a computer in a way similar to how it was done on those (early) switchboard-based computers that were configured by manually making wired connections between a fixed set of logical and arithmetical devices. You could say that one would be "building hardware" in such case as well, but since the system could be easily reconfigured at any time so that it could perform a different function, to me it looks more like programming... (I guess, the right way to look at this is as something where the distinction between hardware and software gets blurred to the point that any serious argument about the meaning of words becomes, well, meaningless.)

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#28
post #21

Earlier quoted context omitted.

I always thought the "best-practice" architecture for these sort of high-speed SDN switches was to have a custom ASIC "data plane" (hard realtime) that can be signalled from a CPU "control plane" (running something soft realtime like Erlang.) Would an FPGA really give advantages over such a setup? I can't imagine it'd beat the CPU at being a control plane—so it'd mostly have to be that it has a lower TCO as a data pl…

Yeah, it would have an advantage: you could deploy it without spending hundreds of thousands of dollars on ASIC production or prototyping. It's the main use for FPGA's. They're better so long as unit price is cheaper than masks and such for ASIC's. In this case, each customer would have a relatively small number of the switches where volume doesn't justify an ASIC. Might be enough switches & customers to justify lice…

At Azure scale, ASICs would definitely be cheaper but they're still using FPGAs for the flexibility. OTOH AWS is using ASICs so we can see that different clouds have made different tradeoffs.

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#29

I saw the page via wayback machine since the site was down at the time. Seems like a cool academic project. I've been getting into FPGAs personally, with this exact application in mind. I've been really stymied by how to process packets in hardware. The obvious approach seems to be to run an RTOS or even full-fledged linux if your FPGA has hard IP cores on it. But is there a better way? How much performance would one…

The place to start is NetFPGA since they have open source Verilog, tutorials, and a community. http://www.cl.cam.ac.uk/research/srg/netos/projects/netfpga/...

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#30
post #27

Earlier quoted context omitted.

Dont be fooled by the appearance of VHDL/Verilog. you are building hardware with them. So writing a TCP/IP stack in VHDL would be almost like physically building a TCP/IP stack with physical logic gate IC's. I looked into this a few years ago. If you can settle for just sending bytes on an ethernet cable, you can relatively easily TX/RX using UDP Multicast. The FPGA can beam bits straight to the PHY adapter and out t…

> you are building hardware with them Actually, not quite, not with FPGA. Sure, you can use an HDL to synthesize a custom microchip, in which case you indeed would be "building hardware", but you can also target an FPGA specifically, in which case you would essentially be programming a kind of a computer in a way similar to how it was done on those (early) switchboard-based computers that were configured by manually…

"encoding of control flow" (program, automaton, turing machines) vs. "encoding of data flow" (PAL configurations, CPLD, FPGA bitstreams, analog computer configuration)
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