191–200 of 268 posts
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It seems a little dramatic to think Nvidia would spend $40 billion just to run ARM into the ground.
People here have an axe to grind against Nvidia it seems. Somehow seen as Intel but for GPUs despite being highly innovative and continuously so.
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Even though I've long followed Arm (I went to a presentation in Cambridge from Steve Furber about the Arm 1 in 1985ish even before the first commercial chips shipped) I'm a bit sceptical about how much value would ever be generated for the UK economy by Arm. The business model is about low margins and selling to everyone around the world so its hard to see how being next door to Arm (geographically) would be a big ad…
The theory is that clusters form around “anchor tenants”; Cambridge has the University (and its excellent CS departments), ARM and some others, and is close to he largest capital marketplaces in the world, grandiosely bundled into a so-called “silicon fen”. So school leavers can get jobs, network, start companies, develop other tech in a virtuous circle. Well that’s the theory; nobody has actually been able to reprod…
Yes. Largest technology hub in Europe sits in Eindhoven (Veldhoven), Netherlands where you have a technical university, but the real anchor was Philips who were headquartered there. Eindhoven is home to ASML and Signify (formerly Philips Lighting) among others.
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None whatsoever. They have a license from the Newton days which allows them to do whatever they want perpetually.
Is there a citation for the perpetual licence? I would have just assumed they would have purchased a long-term licence to build cores for a particular ISA version
I doubt that NVidia controlled ARM will ever be so inclined to sell another architecture license ... they would rather sell you their own designed ARM chips.
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I could imagine we might see an architecture with 128 bit word sizes, but I doubt we'd see 128 bit pointers (aka a 128 bit address space) any time soon. Itd just be more annoying than anything. I personally have even written software where we do pointer path to get 32 bit indexes rather than storing full 64 bit pointers simply because of space constraints (like trying to fit a hot struct into a single cache line) Hav…
> but I doubt we'd see 128 bit pointers (aka a 128 bit address space) any time soon. I can see 128-bit pointers being a thing: not because of 128-bits of address space, but for the ability to embed type information directly in the pointer - which could improve performance for dynamic-dispatch scenarios or runtime type-safety built-in to the hardware itself. > Having a native uint128_t would make dealing with IPv6 add…
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I could imagine we might see an architecture with 128 bit word sizes, but I doubt we'd see 128 bit pointers (aka a 128 bit address space) any time soon. Itd just be more annoying than anything. I personally have even written software where we do pointer path to get 32 bit indexes rather than storing full 64 bit pointers simply because of space constraints (like trying to fit a hot struct into a single cache line) Hav…
Current chips don't even actually support 64 bits of hardware address yet, seeing as few users can afford 2 exbibytes of DRAM and shuffling around a full 64 bits of hardware address is a noticeable tax on the chip.
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It won't be a duopoly because nVidia doesn't make x86 hardware. Even if they did, there would be three contenders (AMD, Intel, nVidia). nVidia is becoming an AI/HPC behemoth. GPUs for Compute, ARM for feeding the GPUs, Infiniband for interconnect. All in a tightly integrated, closed package. This is a clear monopoly. They're light years ahead in terms of GPU development and Debugging tools when compared to AMD. CUDA…
Looking 10 years into the future, do we really need x86 though? Is it not possible that Intel will loose and CISC will become basically obsolete? (Yeah, I'm ignoring AMD here for no good reason, but we were talking about nVidia vs Intel anyway.)
Yes, AVX has a clock penalty but, if your code is math heavy (scientific, simulation, etc.) it's extremely convenient for some scenarios still.
GPUs are not perfect for "streaming data processing" or intermittent processing because their setup and startup time is still in seconds. You need to transfer data first to the GPU if you want the full speed also. In CPU computing this overhead is nonexistent.
I develop a scientific application and we've seen that with the improvements in the FPU and SIMD pipelines across generations, a 2GHz core can match a 3.7GHz one in per core performance in some cases. This is insane. This is a simple compilation with -O3 only. march and mtune were not added intentionally.
Unless GPU becomes as transparent as CPU, we either need to catch or surpass X86 on SIMD / pure math level to replace it completely.
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People are speculating that Nvidia might end Arm core licensing, but Apple would definitely shut it down. Apple's culture is totally incompatible with Arm's business model.
That doesn't preclude Apple owning it but operating it as an independent subsidiary. Even if it wasn't a subsidiary Apple already operates some divisions and teams differently, such as its Webkit team (one of the few teams where employees are allowed to have Github.com user accounts...)
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People are speculating that Nvidia might end Arm core licensing, but Apple would definitely shut it down. Apple's culture is totally incompatible with Arm's business model.
What how would Apple shutdown what Nvidia is doing? If they buy ARM they can stop selling licenses for it if they like. Of course they have to honor any prior contracts with other customers but when those run out, adios. Apple has their own license to use ARM architecture/ISA as long as they like, so what Nvidia does when they own ARM is really no concern to the fruit company
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I agree with what you said, but there is a reason for wanting to converge on ARM. There exists no good alternative. ARMv8.2 or newer is a very well designed ISA, while RISC-V is a very bad ISA and I would hate to be forced to use it. OpenPOWER is a far better ISA than RISC-V, but unfortunately most developers do not have any experience with POWER and they have the wrong belief that POWER is some antique ISA while RIS…
Why is RISC-V bad? You spend paragraphs ripping on it without actually explaining why it's bad.
The summary is that RISC-V is inefficient because it requires more instructions to do the same work as other ISAs and it does not have any advantage to compensate for this flaw.
Those extra instructions appear especially in almost all loops and the most important reason is that RISC-V has a worse set of addressing modes than the the vacuum-tube computers from more than 60 years ago, which were built only with a few thousands tubes, compared to the millions or billions of transistors available now for a CPU.
Because of this defect of the RISC-V ISA, the Alibaba team who designed the RISC-V implementation with the highest current performance (Xuantie910, which was presented last month at Hot Chips) had to add a custom ISA extension with additional addressing modes, in order to be able to reach an acceptable speed.
Whenever the designers of the RISC-V ISA are criticized, they reply that the larger number of instructions is not important, because any high-performance implementation should do instruction fusion, to be able to reach the IPC of other ISAs.
Nevertheless, that is wrong for 2 reasons, instruction fusion cannot reduce the larger code size due to the inefficient instruction encoding and the hardware required for decoding more instructions in parallel and for doing instruction fusion is much more complex than the hardware required for decoding less instructions with a better encoding as in other ISAs.
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It seems a little dramatic to think Nvidia would spend $40 billion just to run ARM into the ground.
People here have an axe to grind against Nvidia it seems. Somehow seen as Intel but for GPUs despite being highly innovative and continuously so.