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YC is wrong about LLMs for chip design

zach.be

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Re: YC is wrong about LLMs for chip design

#171

Post by lizknope »

I've been designing chips for almost 30 years.

We have a bunch of AI initiatives in my company but most of them are about using Copilot to help write scripts to automate the design flow. Our physical design flow are thousands of lines of Tcl and Python code.

The article mentions High Level Synthesis. I've been reading about this since my first job in the 1990's. I've worked on at least 80 chips and I've never seen any chip use one of these tools except for some tiny section that was written by some academics who didn't want to learn Verilog for reasons.

Re: YC is wrong about LLMs for chip design

#173

Post by seizethecheese »

> (quoting YC) We know there is a clear engineering trade-off: it is possible to optimize especially specialized algorithms or calculations such as cryptocurrency mining, data compression, or special-purpose encryption tasks such that the same computation would happen faster (5x to 100x), and using less energy (10x to 100x).

> If Gary Tan and YC believe that LLMs will be able to design chips 100x better than humans currently can, they’re significantly underestimating the difficulty of chip design, and the expertise of chip designers.

I may be confused, but isn’t the author fundamentally misunderstanding YC’s point? I read YC as simply pointing out the benefit of specialized compute, like GPUs, not making any point about the magnitude of improvement LLMs could achieve over humans.

Re: YC is wrong about LLMs for chip design

#174

Post by nerdponx »

spamizbad wrote: post #21

LLMs have a long way to go in the world of EDA. A few months ago I saw a post on LinkedIn where someone fed the leading LLMs a counter-intuitively drawn circuit with 3 capacitors in parallel and asked what the total capacitance was. Not a single one got it correct - not only did they say the caps were in series (they were not) it even got the series capacitance calculations wrong. I couldn’t believe they whiffed it a…

> I couldn’t believe they whiffed it

Why should we expect a general-purpose instruction-tuned LLM to get this right in the first place? I am not at all surprised it didn't work, and I would be more than a little surprised if it did.

Re: YC is wrong about LLMs for chip design

#175

Post by jjk166 »

zachbee wrote: post #120
aubanel wrote: post #110

I know nothing about chip design. But saying "Applying AI to field X won't work, because X is complex, and LLMs currently have subhuman performance at this" always sounds dubious. VCs are not investing in the current LLM-based systems to improve X, they're investing in a future where LLM based systems will be 100x more performant. Writing is complex, LLMs once had subhuman performance, and yet. Digital art. Music (se…

I didn't get into this in the article, but one of the major challenges with achieving superhuman performance on Verilog is the lack of high-quality training data. Most professional-quality Verilog is closed source, so LLMs are generally much worse at writing Verilog than, say, Python. And even still, LLMs are pretty bad at Python!

I would imagine it is a reasonably straightforward thing to create a simulator that generates arbitrary chip designs and the corresponding verilog that can be used as training data. It would be much like how AlphaFold was trained. The chip designs don't need to be good, or even useful, they just need to be valid so the LLM can learn the underlying relationships.

Re: YC is wrong about LLMs for chip design

#176

Post by marcosdumay »

dgfitz wrote: post #132
Mistletoe wrote: post #59

Earlier quoted context omitted.

What's after this? Because I really do feel the economy is standing on a cliff right now. I don't see anything after this that can prop stocks up.

That’s because we are still waiting for the 2008 bubble to pop, which was inflated by the 2020 bubble. It’s going to be bad. People will blame trump, Harris would be eating the same shit sandwich. It’s gonna be bad.

What makes you think he won't just inflate the bubble again?

Should we expect money pumps to generate inflation quicker on this cycle than on the last ones? If so, why?

Re: YC is wrong about LLMs for chip design

#177

Post by jjk166 »

duped wrote: post #167
aubanel wrote: post #110

I know nothing about chip design. But saying "Applying AI to field X won't work, because X is complex, and LLMs currently have subhuman performance at this" always sounds dubious. VCs are not investing in the current LLM-based systems to improve X, they're investing in a future where LLM based systems will be 100x more performant. Writing is complex, LLMs once had subhuman performance, and yet. Digital art. Music (se…

AI still has subhuman performance for art. It feels like the venn diagram of people who are bullish on LLMs and people who don't understand logistic curves is a circle.

You ask 100,000 humans each to make a photo realistic rendering of a alpaca playing basketball on the moon in 90 seconds, an LLM is going to outperform every single one of them.

Re: YC is wrong about LLMs for chip design

#178

Post by alephnerd »

seizethecheese wrote: post #173

> (quoting YC) We know there is a clear engineering trade-off: it is possible to optimize especially specialized algorithms or calculations such as cryptocurrency mining, data compression, or special-purpose encryption tasks such that the same computation would happen faster (5x to 100x), and using less energy (10x to 100x). > If Gary Tan and YC believe that LLMs will be able to design chips 100x better than humans c…

I think the issue is Garry Tan's video RFS merged "LLMs for EDA" with "Purpose Built Compute" for specialized usecases. The title "LLMs for Chip Design" doesn't help either.

From my reading of the RFS (not the video) it appears they are essentially asking for the next Groq or SambaNova.

Personally, this kind of communication issue would give me a long pause if I was considering YC for this segment, as this is a fairly basic thesis to communicate, and if a basic thesis can be muddled, can the advice provided be strong as well, especially compared to peer early stage funders in this space?

Re: YC is wrong about LLMs for chip design

#179

Post by dgfitz »

marcosdumay wrote: post #176
dgfitz wrote: post #132

Earlier quoted context omitted.

That’s because we are still waiting for the 2008 bubble to pop, which was inflated by the 2020 bubble. It’s going to be bad. People will blame trump, Harris would be eating the same shit sandwich. It’s gonna be bad.

What makes you think he won't just inflate the bubble again? Should we expect money pumps to generate inflation quicker on this cycle than on the last ones? If so, why?

I think only an ignorant person doesn’t see the train wreck coming, and how making more money won’t fix fuck all.

Re: YC is wrong about LLMs for chip design

#180

Post by sangnoir »

nerdponx wrote: post #174
spamizbad wrote: post #21

LLMs have a long way to go in the world of EDA. A few months ago I saw a post on LinkedIn where someone fed the leading LLMs a counter-intuitively drawn circuit with 3 capacitors in parallel and asked what the total capacitance was. Not a single one got it correct - not only did they say the caps were in series (they were not) it even got the series capacitance calculations wrong. I couldn’t believe they whiffed it a…

> I couldn’t believe they whiffed it Why should we expect a general-purpose instruction-tuned LLM to get this right in the first place? I am not at all surprised it didn't work, and I would be more than a little surprised if it did.

> Why should we expect a general-purpose instruction-tuned LLM to get this right in the first place?

The argument goes: Language encodes knowledge, so from the vast reams of training data, the model will have encoded the fundamentals of electromagnetism. This is based in the belief that LLMs being adept at manipulating language, are therefore inchoate general intelligences, and indeed, attaining AGI is a matter of scaling parameters and/or training data on the existing LLM foundations.

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