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AMD claims Arm ISA doesn't offer efficiency advantage over x86

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Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#161

Post by astrange »

mort96 wrote: post #20
exmadscientist wrote: post #2

This is an entirely uncontroversial take among experts in the space. x86 is an old CISC-y hot mess. RISC-V is a new-school hyper-academic hot mess. Recent ARM is actually pretty good. And none of it matters, because the uncore and the fabrication details (in particular, whether things have been tuned to run full speed demon or full power sipper) completely dominate the ISA. In the past x86 didn't dominate in low powe…

This matches my understanding as well, as someone who has a great deal of interest in the field but never worked in it professionally. CPUs all have a microarchitecture that doesn't look like the ISA at all, and they have an instruction decoder that translates ISA one or more ISA instructions into zero or more microarchitectural instructions. There are some advantages to having a more regular ISA, such as the ability…

uOps are kind of oversold in the CPU design mythos. They are not that different from the original ISA, and some x86 instructions (like lea) are both complex and natural fits for hardware so don't get microcoded.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#162

Post by dotnet00 »

nottorp wrote: post #128
shmerl wrote: post #110

Earlier quoted context omitted.

AMD do handle power consumption well, at least if you run in eco mode instead of pushing CPU to the limits. I always set eco mode on on modern Ryzens.

I have a Ryzen box that I temperature limited to 65 C indeed. That was about 100 W in my office with just the graphics integrated into the Ryzen. However, next to it there's a M2 mac mini that uses all of 37 W when I'm playing Cyberpunk 2077 so... > Both Intel and AMD provide runtime power control so this is tunable. The last ~10% of performance requires far more than 10% of the power. Yes but the defaults are insane…

If you're measuring the draw at the wall, AFAIK desktop Ryzen keeps the chipset running at full power all the time and so even if the CPU is idle, it's hard to drop below, say, ~70W at the wall (including peripherals, fans, PSU efficiency etc).

Apparently desktop Intel is able to drop all the way down to under 10W on idle.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#163

Post by Dylan16807 »

jcranmer wrote: post #146
codedokode wrote: post #124

Earlier quoted context omitted.

x86 decoding must be a pain - I vaguely remember that they have trace caches (a cache of decoded micro-operations) to skip decoding in some cases. You probably don't make such caches when decoding is easy. Also, more complicated decoding and extra caches means longer pipeline, which means more price to pay when a branch is mispredicted (binary search is a festival of branch misprediction for example, and I got 3x acc…

> x86 decoding must be a pain So one of the projects I've been working on and off again is the World's Worst x86 Decoder, which takes a principled approach to x86 decoding by throwing out most of the manual and instead reverse-engineering semantics based on running the instructions themselves to figure out what they do. It's still far from finished, but I've gotten it to the point that I can spit out decoder rules. A…

> While I'm not a hardware designer, my gut says that you can probably do x86 instruction length-decoding in one cycle

That's some very faint praise there. Especially when you're trying to chop up several instructions every cycle. Meanwhile RISC-V is "count leading 1s. 0-1:16bit 2-4:32bit 5:48bit 6:64bit"

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#164

Post by astrange »

gigatexal wrote: post #121
Yizahi wrote: post #93

Earlier quoted context omitted.

It's only recently when consumer software has become truly multithreaded. Historically there were major issues with that until very recently. Remember Bulldozer fiasco? They bet on the parallel execution more than Intel at the same time, e.g. same price Intel chip was 4 core, while AMD had 8 cores (consumer market). Single thread performance had been the deciding factor for decades. Even today AMDs outlier SKUs with…

But the OS has been able to take advantage of it since mountain lion with grand central dispatch. I could be wrong with the code name. This makes doing parallel things very easy. But most every OS can.

Parallelism is actually very difficult and libdispatch is not at all perfect for it. Swift concurrency is a newer design and gets better performance by being /less/ parallel.

(This is mostly because resolving priority inversions turns out to be very important on a phone, and almost noone designs for this properly because it's not important on servers.)

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#165

Post by astrange »

bryanlarsen wrote: post #53
x0x0 wrote: post #50

Earlier quoted context omitted.

> That's not mostly because of a better ISA Genuinely asking -- what is it due to? Because like the person you're replying to, the m* processors are simply better: desktop-class perf on battery that hangs with chips with 250 watt TDP. I have to assume that amd and intel would like similar chips, so why don't they have them if not due to the instruction set? And AMD is using TSMC, so that can't be the difference.

What's it due to? At least this, probably more. - more advanced silicon architecture. Apple spends billions to get access to the latest generation a couple of years before AMD. - world class team, with ~25 years of experience building high speed low power chips. (Apple bought PA Semi to make these chips, which was originally the team that build the DEC StrongARM). And then paid & treated them properly, unlike Intel &…

> And then paid & treated them properly, unlike Intel & AMD

Relatively properly. Nothing like the pampering software people get. I've heard Mr. Srouji is very strict about approving promotions personally etc.

(…by heard I mean I read Blind posts)

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#166

Post by ryukoposting »

jdsully wrote: post #68
toast0 wrote: post #36

Earlier quoted context omitted.

Like o11c says, that's setting everyone up for a bad time. If the heterogenous cores are similar, but don't all support all the instructions, it's too hard to use. You can build legacy instructions in a space optimized way though, but there's no reason not to do that for the high performance cores too --- if they're legacy instructions, one expects them not to run often and perf doesn't matter that much. Intel droppe…

I don't really understand why the OS can't just trap the invalid instruction exception and migrate it to the P-core. E.g. AVX-512 and similar. For very old and rare instructions they can emulate them. We used to do that with FPU instructions on non-FPU enabled CPUs way back in the 80s and 90s.

We still do that with some microcontrollers! https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html#index-mf...

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#167

Post by astrange »

bsder wrote: post #115
x0x0 wrote: post #50

Earlier quoted context omitted.

> That's not mostly because of a better ISA Genuinely asking -- what is it due to? Because like the person you're replying to, the m* processors are simply better: desktop-class perf on battery that hangs with chips with 250 watt TDP. I have to assume that amd and intel would like similar chips, so why don't they have them if not due to the instruction set? And AMD is using TSMC, so that can't be the difference.

> Genuinely asking -- what is it due to? Mostly memory/cache subsystem. Apple was willing to spend a lot of transistors on cache because they were optimizing the chips purely for mobile and can bury the extra cost in their expensive end products. You will note that after the initial wins from putting stonking amounts of cache and memory bandwidth in place, Apple has not had any significant performance jump beyond the…

They aren't aiming for performance in the first place. It's a coincidence that it has good performance. They're aiming for high performance/power ratios.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#168

Post by toast0 »

choilive wrote: post #148
whynotminot wrote: post #33

Earlier quoted context omitted.

An annoying thing people have done since Apple Silicon is claim that its advantages were due to Arm. No, not really. The advantage is Apple prioritizing efficiency, something Intel never cared enough about.

In most cases, efficiency and performance are pretty synonymous for CPUs. The faster you can get work done (and turn off the silicon, which is admittedly a higher design priority for mobile CPUs) the more efficient you are. The level of talent Apple has cannot be understated, they have some true CPU design wizards. This level of efficiency cannot be achieved without making every aspect of the CPU as fast as possible;…

> In most cases, efficiency and performance are pretty synonymous for CPUs. The faster you can get work done (and turn off the silicon, which is admittedly a higher design priority for mobile CPUs) the more efficient you are.

Somewhat yes, hurry up and wait can be more efficient than running slow the whole time. But at the top end of Intel/AMD performance, you pay a lot of watts to get a little performance. Apple doesn't offer that on their processors, and when they were using Intel processors, they didn't provide thermal support to run in that mode for very long either.

The M series bakes in a lower clockspeed cap than contemperary intel/amd chips; you can't run in the clock regime where you spend a lot of watts and get a little bit more performance.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#169

Post by astrange »

gt0 wrote: post #117

I'm glad an authoritative source has stated this. It's been ongoing BS for years. I first got into ARM machines with the Acorn Archimedes and even back then, people were spouting some kind of intrinsic efficiency benefit to ARM that just didn't make any sense.

It is true for small cores, it's just not important for big cores compared to all the other things you have to solve.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#170

Post by AnthonyMouse »

wvenable wrote: post #95
whynotminot wrote: post #33

Earlier quoted context omitted.

An annoying thing people have done since Apple Silicon is claim that its advantages were due to Arm. No, not really. The advantage is Apple prioritizing efficiency, something Intel never cared enough about.

By prioritizing efficiency, Apple also prioritizes integration. The PC ecosystem prefers less integration (separate RAM, GPU, OS, etc) even at the cost of efficiency.

> By prioritizing efficiency, Apple also prioritizes integration. The PC ecosystem prefers less integration (separate RAM, GPU, OS, etc) even at the cost of efficiency.

People always say this but "integration" has almost nothing to do with it.

How do you lower the power consumption of your wireless radio? You have a network stack that queues non-latency sensitive transmissions to minimize radio wake-ups. But that's true for radios in general, not something that requires integration with any particular wireless chip.

How do you lower the power consumption of your CPU? Remediate poorly written code that unnecessarily keeps the CPU in a high power state. Again not something that depends on a specific CPU.

How much power is saved by soldering the memory or CPU instead of using a socket? A negligible amount if any; the socket itself has no significant power draw.

What Apple does well isn't integration, it's choosing (or designing) components that are each independently power efficient, so that then the entire device is. Which you can perfectly well do in a market of fungible components simply by choosing the ones with high efficiency.

In fact, a major problem in the Android and PC laptop market is that the devices are insufficiently fungible. You find a laptop you like where all the components are efficient except that it uses an Intel processor instead of the more efficient ones from AMD, but those components are all soldered to a system board that only takes Intel processors. Another model has the AMD APU but the OEM there chose poorly for the screen.

It's a mess not because the integration is poor but because the integration exists instead of allowing you to easily swap out the part you don't like for a better one.

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