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YC is wrong about LLMs for chip design

zach.be

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Re: YC is wrong about LLMs for chip design

#161

Post by herval »

namaria wrote: post #100
herval wrote: post #19

Earlier quoted context omitted.

This severely discounts the fact that you’re comparing a model that _knows the average about everything_ to a single human’s capabilit. Also they can do it instantly, instead of having to coordinate many humans over long periods of time. You can’t straight up compare one LLM to one human

"Knows the average relationship amongst all words in the training data" ftfy

it seems that's sufficient to do a lot of things better than the average human - including coding, writing, creating poetry, summarizing and explaining things...

Re: YC is wrong about LLMs for chip design

#162

Post by xg15 »

brookst wrote: post #24
klabb3 wrote: post #10

I don’t mind LLMs in the ideation and learning phases, which aren’t reproducible anyway. But I still find it hard to believe engineers of all people are eager to put a slow, expensive, non-deterministic black box right at the core of extremely complex systems that need to be reliable, inspectable, understandable…

You find it hard to believe that non-deterministic black boxes at the core of complex systems are eager to put non-deterministic black boxes at the core of complex systems?

Yes. One does not have to do with the other.

Re: YC is wrong about LLMs for chip design

#163

Post by Neywiny »

eight_ender wrote: post #54
Neywiny wrote: post #6

I think this whole article is predicated on misinterpreting the ask. It wasn't for the chip to take 100x less power, it was for the algorithm the chip implements. Modern synthesis tools and optimisers extensively look for design patterns the same way software compilers do. That's why there's recommended inference patterns. I think it's not impossible to expect an LLM to expand the capture range of these patterns to m…

Was surprised this comment was this far down. I re-read the YC ask three times to make sure I wasn’t crazy. Dude wrote the whole article based on a misunderstanding.

Thanks... I had more points earlier but I guess people changed their mind and decided they liked it better his way idk

Re: YC is wrong about LLMs for chip design

#165

Post by DannyBee »

e_y_ wrote: post #146
zachbee wrote: post #120

Earlier quoted context omitted.

I didn't get into this in the article, but one of the major challenges with achieving superhuman performance on Verilog is the lack of high-quality training data. Most professional-quality Verilog is closed source, so LLMs are generally much worse at writing Verilog than, say, Python. And even still, LLMs are pretty bad at Python!

That's probably where there's a big advantage to being a company like Nvidia, which has both the proprietary chip design knowledge/data and the resources/money and AI/LLM expertise to work on something specialized like this.

I strongly doubt this - they don't have enough training data either - you are confusing (i think) the scale of their success with the amount of verilog they possess.

IE I think you are wildly underestimating both the scale of training data needing, and wildly overestimating the amount of verilog code possessed by nvidia.

GPU's work by having moderate complexity cores (in the scheme of things) that are replicated 8000 times or whatever. That does not require having 8000 times as much useful verilog, of course.

The folks who have 8000 different chips, or 100 chips that each do 1000 things, would probably have orders of magnitude more verilog to use for training

Re: YC is wrong about LLMs for chip design

#166

Post by namaria »

herval wrote: post #161
namaria wrote: post #100

Earlier quoted context omitted.

"Knows the average relationship amongst all words in the training data" ftfy

it seems that's sufficient to do a lot of things better than the average human - including coding, writing, creating poetry, summarizing and explaining things...

A human specialized in any of those things vastly outperforms the average human let alone an LLM.

Re: YC is wrong about LLMs for chip design

#167

Post by duped »

aubanel wrote: post #110

I know nothing about chip design. But saying "Applying AI to field X won't work, because X is complex, and LLMs currently have subhuman performance at this" always sounds dubious. VCs are not investing in the current LLM-based systems to improve X, they're investing in a future where LLM based systems will be 100x more performant. Writing is complex, LLMs once had subhuman performance, and yet. Digital art. Music (se…

AI still has subhuman performance for art. It feels like the venn diagram of people who are bullish on LLMs and people who don't understand logistic curves is a circle.

Re: YC is wrong about LLMs for chip design

#168

Post by aaron695 »

aubanel wrote: post #110

I know nothing about chip design. But saying "Applying AI to field X won't work, because X is complex, and LLMs currently have subhuman performance at this" always sounds dubious. VCs are not investing in the current LLM-based systems to improve X, they're investing in a future where LLM based systems will be 100x more performant. Writing is complex, LLMs once had subhuman performance, and yet. Digital art. Music (se…

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