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How AlphaChip transformed computer chip design

deepmind.google

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Re: How AlphaChip transformed computer chip design

#161

Post by vlovich123 »

ebalit wrote: post #160
vlovich123 wrote: post #154

Earlier quoted context omitted.

Spanner is literally a Google cloud product you can buy ignoring that it underpins a good amount of Google tech internally. The same is true of other stuff. Dismissing it as a recruitment tool indicates you haven’t worked at Google or really know much about their product lines.

He didn't say that Spanner is only a recruitment tool but that the blog posts about Spanner (and other core technologies of Google) might be.

More people see the blog posts as it’s a more gentle introduction than the paper itself. Sure it might generate interest in Google but it also generates interest for people to further look into the research. They are not for sales of the tech but I’m not sure the impact is just a recruitment tool even if that’s how Google justified the work to itself.

Re: How AlphaChip transformed computer chip design

#162

Post by theodorthe5 »

lacker wrote: post #134
porphyra wrote: post #56

Earlier quoted context omitted.

The Deepmind chess paper was also criticized for unfair evaluation, as they were using an older version of Stockfish for comparison. Apparently, the gap between AlphaZero and that old version of Stockfish (about 50 elo iirc) was about the same as the gap between consecutive versions of Stockfish.

Indeed, six years later, the AlphaZero algorithm is not the best performing algorithm for chess. LCZero (uses AlphaZero algorithm) won some TCECs after it came out but for the past few years Stockfish (does not use AlphaZero algorithm) has been winning consistently. https://en.wikipedia.org/wiki/Top_Chess_Engine_Championship So perhaps the critics had a point there.

Do you understand StockFish filled the gap only after using NNs as well in the evaluation function? And that was a direct consequence of AlphaZero research.

Re: How AlphaChip transformed computer chip design

#163

Post by FrustratedMonky »

anna-gabriella wrote: post #149
FrustratedMonky wrote: post #53

So AI designing it's own chips. Now that is moving towards exponential growth. Like at the end of "Colossus" the movie. Forget LLM's. What DeepMind is doing seems more like how an AI will rule, in the world. Building real world models, and applying game logic like winning. LLM's will just be the text/voice interface to what DeepMind is building.

I can tell you get excited by SciFi, that's where Google's work belongs - people have been unable to reproduce it outside Google by a long shot.

Alpha-GO was not sci-fi. And that was 2016

Protein Folding? That was against a defined data set and other organizations.

Nobody can re-produce? Isn't that the definition of a competitive advantage?

They are building something others can't, and that is bad? That is what companies do.

Re: How AlphaChip transformed computer chip design

#164

Post by kevindamm »

HPsquared wrote: post #33
fph wrote: post #10

Earlier quoted context omitted.

My state-of-art bubblesort implementation is also superhuman at sorting numbers.

Nice. Still true though! We are in the bubble sort era of AI.

When we get better quantum computers we can start using spaghetti sort.

Re: How AlphaChip transformed computer chip design

#166

Post by AshamedCaptain »

gabegobblegoldi wrote: post #114
thesz wrote: post #100

Eurisco [1], if I remember correctly, was once used to perform placement-and-route task and was pretty good at it. [1] https://en.wikipedia.org/wiki/Eurisko What's more, Eurisco was then used in designing Traveler TCS' game fleet of battle spaceships. And Eurisco used symmetry-based placement learned from VLSI design in the design of the spaceships' fleet. Can AlphaChip's heuistics be used anywhere else?

Doesn’t look like it. In fact the original paper claimed that their RL method could be used for all sorts of combinatorial optimization problems. Yet they chose an obscure problem in chip design and showed their results on proprietary data instead of standard public benchmarks. Instead they could have demonstrated their amazing method on any number of standard NP hard optimization problems e.g. traveling salesman, bi…

> Yet they chose an obscure problem in chip design

It is not obscure (in chip design). If anything it is one of the most easily reachable problems. Almost every other PhD student in the field has implemented a macro placer, even if just for fun, and there are frequent academic competitions. A lot of design houses also roll their own macro placers since it's not a difficult problem and generally adding a bit of knowledge of your design style can help you gain an extra % over the generic commercial tools.

It does not surprise me at all that they decided to start with this for their foray into chip EDA. It's the minimum effort route.

Re: How AlphaChip transformed computer chip design

#167

Post by Upvoter33 »

To me, there is an underlying issue: why are so many DeepX papers being sent to Nature, instead of appropriate CS forums? If you are doing better work in chip design, send it to IPSD or ISCA or whatever, and then you will get the types of reviews needed for this work. I have no idea what Nature does with a paper like this.

Re: How AlphaChip transformed computer chip design

#168

Post by marcinzm »

negativeonehalf wrote: post #120
isotypic wrote: post #111

Earlier quoted context omitted.

Why does pretraining or not matter in the ISPD 2023 paper? The circuit_training repo, as noted in the rebuttal of the rebuttal by the ISPD 2023 paper authors, claims training from scratch is "comparable or better" than fine-tuning the pre-trained model. So no matter your opinion on the importance of the pretraining step, this result isn't replicable, at which point the ball is in Google's court to release code/checkp…

The quick-start guide in the repo that said you don't have to pre-train for the sample test case, meaning that you can validate your setup without pre-training. That does not mean you don't need to pre-train! Again, the paper talks at length about the importance of pre-training.

This is what the repo says:

>Results >Ariane RISC-V CPU >View the full details of the Ariane experiment on our details page. With this code we are able to get comparable or better results training from scratch as fine-tuning a pre-trained model.

The paper includes a graph showing that it takes longer for Ariane to train without pre-training however the results in the end are the same.

Re: How AlphaChip transformed computer chip design

#169

Post by gabegobblegoldi »

smokel wrote: post #74
vighneshiyer wrote: post #41

This work from Google (original Nature paper: https://www.nature.com/articles/s41586-021-03544-w ) has been credibly criticized by several researchers in the EDA CAD discipline. These papers are of interest: - A rebuttal by a researcher within Google who wrote this at the same time as the "AlphaChip" work was going on ("Stronger Baselines for Evaluating Deep Reinforcement Learning in Chip Placement"): http://47.190.8…

I don't really understand all the fuss about this particular paper. Nearly all papers on AI techniques are pretty much impossible to reproduce, due to details that the authors don't understand or are trying to cover up. This is what you get if you make academic researchers compete for citation counts. Pretraining seems to be an important aspect here, and it makes sense that such pretraining requires good examples, wh…

[dead]

Re: How AlphaChip transformed computer chip design

#170

Post by gabegobblegoldi »

AshamedCaptain wrote: post #166
gabegobblegoldi wrote: post #114

Earlier quoted context omitted.

Doesn’t look like it. In fact the original paper claimed that their RL method could be used for all sorts of combinatorial optimization problems. Yet they chose an obscure problem in chip design and showed their results on proprietary data instead of standard public benchmarks. Instead they could have demonstrated their amazing method on any number of standard NP hard optimization problems e.g. traveling salesman, bi…

> Yet they chose an obscure problem in chip design It is not obscure (in chip design). If anything it is one of the most easily reachable problems. Almost every other PhD student in the field has implemented a macro placer, even if just for fun, and there are frequent academic competitions. A lot of design houses also roll their own macro placers since it's not a difficult problem and generally adding a bit of knowle…

Sorry. I meant obscure relative to the large space of combinatorial optimization problems not just chip design.

Most design houses don’t write their own macro placers but customize commercial flows for their designs.

The problem with macro placement as an RL technology demonstrator is that to evaluate quality you need to go through large parts of the design flow which involves using other commercial tools. This makes it incredibly hard to evaluate superiority since all those steps and tools add noise.

Easier problems would have been to use RL to minimize the number of gates in a logic circuit or just focus on placement with half perimeter wirelength (I think this is what you mean with your grad student example). Essentially solving point problems in the design flow and evaluating quality improvements locally.

They evaluated quality globally and only globally and that destroys credibility in this business due to the noise involved unless you have lots of examples, can show statistical significance, and (unfortunately for the authors) also local improvements.

That’s what the follow on studies did and that’s why the community has lost faith in this particular algorithm.

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