Disabling cores that have 100% passed QA is quite commonplace, especially for chips that have been on the market for over a year and thus are being built with yields as mature as they're going to get.
Artificially restricting supply of high-end chips and increasing supply of mid-range chips by disabling fully functional cores is how chip makers preserve their pricing structure. Without doing this, market pressures would force prices down on high-end chips and cause lower bins to mostly disappear from the market, leaving the product line with lower overall margins and a PR nightmare every time a new generation launches with pricing reset back to the initially high levels.
As a rule of thumb: if a chip product line goes a whole year without having new SKUs show up with a higher percentage of cores enabled or higher clock speeds for the same core count, then the manufacturer is artificially restricting supply to make more of the lower-bin parts than naturally occur in the fab output.
> And that correction might be in the form of removing redundancies from the chip design, rather than increasing the supply/lowering the price of higher end SKUs.
Those two courses of action take place on completely different timescales. Disabling cores and other binning tricks can be implemented in no more than a few months. Adding a new chip with a different number of copies of the same IP blocks takes well over a year. Removing redundancy within an IP block (eg. by having fewer spare SRAM blocks for a cache of a fixed capacity) isn't going to happen within a single chip generation.
In the semiconductor world, corrections of any kind tend toward "later" rather than "sooner".