Yes. Bit errors are uncommon and range from benign to crash. Your storage has them, memory has them, network has them. Non error correcting memory very significantly increases risk. And this is the kind of risk you don't notice, until you do and when you do, it's often subtle, insidious, impossible to track down. Servers absolutely. It's debatable on desktop, but we have huge RAM now. Might as well error correct. The…
Does it make any difference if you're using your desktop to compile stuff?
Here is the thing:
Without ECC, or even simple parity on the RAM, the CPU cannot validate a data transfer.
In the 90s, a place I worked for had a server running non parity, non ECC RAM. That machine was fast and cheap.
But it would demonstrate the most bizarre problems, from time to time.
A fresh OS install would fix it. Then a year or so, off the farm again.
I saw no error correction, had it replaced with a very similar machine, no issues.
The argument was, it's only the possibility, and only once in a blue moon...
The bigger the RAM, the faster we do stuff, the sooner "once in a blue moon" tends to happen.
I did put that box on my personal network, and under Linux (was win NT before), seemed fine. In the syslog, after a year, there were various kernel messages, each recovered, but there was something to recover from... Win NT would blue screen a lot. That's different today with better kernel software from Microsoft, but the point is no error correction comes with no real way to understand where some trouble may have come from.
And that was doing light duty stuff. Didn't trust it for a build, frankly.
We get fast, quality, cheap. Pick two :D
more generally, the fact that the CPU cannot know if it's transactions with RAM make any sense, unless ECC or even simple parity are present, should be a worry today.
Our processes are small, clocks fast, density high. We are pushing it on all fronts!
Best employ error correction.
And, back in the day, the Apple 2 had no parity on its RAM, the first IBM PC did. Even those much larger, more robust circuits, clocked slowly, would throw bit errors.
The IBM guys knew that from their experiences.