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A third world engineer responds to “RISC-V: They should have known better”

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Re: A third world engineer responds to “RISC-V: They should have known better”

#141
I lost the thread of his argument when he brought up the shipping expense:

> I pay anywhere from US $60 to US $200 to ship one dollar chips that people everywhere else get free shipping on

then follows with:

> the difference between a ten cent part and a one dollar part is not a rounding error and it is not a detail you get to wave past on the way to the interesting discussion about encodings.

When shipping is so expensive, doesn't the difference between $1 and $.10 unit cost become less relevant?

Re: A third world engineer responds to “RISC-V: They should have known better”

#142
post #87
post #12

To me it feels like the difference in positions is "this could be made better" vs. "but this is already so much better than before". Both are right. Maybe I'm missing something important so far...

Maybe. I'm not sure if the original author's intent was to say how risc-v could be better or to say it is bad and people should use other (proprietary) ISAs instead.

It's more of the former.

Before this, the author has never recommended others stay away from RISC-V, just stated their own distaste for it and a personal preference to use any other ISA if given a choice.

Re: A third world engineer responds to “RISC-V: They should have known better”

#143

Earlier quoted context omitted.

Here are a few random things I know of: * Tenstorrent Ascalon has a neat optimization for certain LMUL>1 SIMD operations. LMUL=2 effectively unrolls the SIMD operation making it read two SIMD registers from every source and write two SIMD registers to the destination. There are however some instructions where LMUL=2 only needs to write to one registers, those are narrowing instructions (e.g. 64-bit to 32-bit truncati…

How do you keep up with such information? Any sources you could recommend? Closest I know would be SemiAnalysis

I basically spend way to much time with RISC-V related things. But the easiest way to get more info about RISC-V developmemts is by watching the youtube uploads of the RISC-V summit talks.

Re: A third world engineer responds to “RISC-V: They should have known better”

#145
post #123
post #66

I think he's kind of speaking past the original author. The original piece is basically about how the author doesn't think that RISC-V will take off outside embedded, because of some design decisions that lead to poor performance compared to ARM64 and because so much of the ISA being optional means that there's too much fragmentation to make binary distribution feasible. Meanwhile, this piece is mainly about how RISC…

The two authors also have a very different definition of what "high-end" means. Dmitry is talking about high-end application processors that you might find in a mid-range or better laptop, smartphone or server. Armstrong Subero seems to think that anything larger than a "dirt cheap microcontroller" is high-end. People shouldn't take this the wrong way, but the VexRISC-V cores in Baochip are not "high-end". They are b…

To add to what you said, I don't see any big issues with high-end prosessors and licenses.

Anyone who spends $200 million to develop a completely new high-end processor microarchitecture every 3 to 5 years is not going to complain about an ARM license too much. You get freedom with $$.

Re: A third world engineer responds to “RISC-V: They should have known better”

#146
post #66

I think he's kind of speaking past the original author. The original piece is basically about how the author doesn't think that RISC-V will take off outside embedded, because of some design decisions that lead to poor performance compared to ARM64 and because so much of the ISA being optional means that there's too much fragmentation to make binary distribution feasible. Meanwhile, this piece is mainly about how RISC…

Interesting. So I've seen a lot of reviews of RISC-V machines and they seem to be a decade or more behind in terms of performance.

I always thought that was a case of "the tech is still catching up",[0] but it sounds like there are fundamental issues that prevent performant implementations?

If so... I heard China was investing heavily in RISC-V, which implies that either they're going to have to settle for permanently crippled perf, or find a way around the issues.

--

[0] Making chips is an extremely high tech process with decades of trial and error and proprietary secrets, so this would be the logical explanation to me regardless of architecture. But I'm not hardware guy, so I'd love to hear more about this!

Re: A third world engineer responds to “RISC-V: They should have known better”

#147
post #93
post #45

Earlier quoted context omitted.

So “you were born somewhere ‘unlucky’, that’s how it goes, sucks to be you”. Is that really your take?

It's a distasteful take to be sure. But, what is GP supposed to do? Frankly I'd rather be told that than the other common but tired SV-resident take of "just hustle, bro, stop sleeping, hustle hustle hustle. Learn to code, take loans from friends and family. Doesn't matter that you're born in a shithole, I was born in a median family myself, we only had one car and we rented our house!!! Just gotta work for it, every…

> But, what is GP supposed to do?

Don't be a smug asshole? Oh, sorry, that's for someone else.

Re: A third world engineer responds to “RISC-V: They should have known better”

#150
post #127

Earlier quoted context omitted.

He explains the difference here: > I can pick up H417s on the official WCH store on Aliexpress with free shipping and no verification hullabalu. I think the point is that anyone can make these chips, so there are Chinese sellers who just throw them in a padded envelope and send them out without bothering with all the stuff "serious" vendors do. And because they're cheap enough, if doesn't matter if some get lost in t…

Sure, but a quick search of AliExpress shows that you can get lots of ARM chips from them too, and I assume those are without any "verification hullabalu" as well, no?

In the article, he addresses the issue of clones vs 1st party RISC chips on AliExpress. As a mere dabbler, I have been bit by undisclosed errata on an STM-compatible/bootleg/clone/counterfeit Arm chip while using the official STM SDK.
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