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How Taalas “prints” LLM onto a chip?

anuragk.com

131–140 of 266 posts

Re: How Taalas “prints” LLM onto a chip?

#131

Few customers value tokens anywhere near what it costs the big API vendors. When the bubble pops the only survivors will be whoever can offer tokens at as close to zero cost as possible. Also whoever is selling hardware for local AI.

To those who use AI to get real work done in real products we build, we very much appreciate the value of each token given how much operational overhead it offsets. A bubble pop, if one does indeed happen, would at best be as disruptive as the dot-com bust.

Re: How Taalas “prints” LLM onto a chip?

#132
Imagine a Framework* laptop with these kinds of chips that could be swapped out as models get better over time

*Framework sells laptops and parts such that in theory users can own a ~~ship~~ laptop of Theseus over time without having to buy a whole new laptop when something breaks or needs upgrade.

Re: How Taalas “prints” LLM onto a chip?

#134
post #107

Earlier quoted context omitted.

The middle ground here would be an FPGA, but I belive you would need a very expensive one to implement an LLM on it.

FPGAs would be less efficient than GPUs. FPGAs don’t scale if they did all GPUs would’ve been replaced by FPGAs for graphics a long time ago. You use an FPGA when spinning a custom ASIC doesn’t makes financial sense and generic processor such as a CPU or GPU is overkill. Arguably the middle ground here are TPUs, just taking the most efficient parts of a “GPU” when it comes to these workloads but still relying on memo…

I thought it was because the number logic elements in a GPU is orders of magnitude higher than in a FPGA, rather than just processing speed. And GPU processing is inherently parallel so the GPU beats the FPGA just based on transistor count.

Re: How Taalas “prints” LLM onto a chip?

#135
post #86
post #30

8B coefficients are packed into 53B transistors, 6.5 transistors per coefficient. Two-inputs NAND gate takes 4 transistors and register takes about the same. One coefficient gets processed (multiplied by and result added to a sum) with less than two two-inputs NAND gates. I think they used block quantization: one can enumerate all possible blocks for all (sorted) permutations of coefficients and for each layer place…

I'm looking forward to the model.toVHDL() method in PyTorch.

Deep Differentiable Logic Gate Networks

Re: How Taalas “prints” LLM onto a chip?

#136

I'm surprised people are surprised. Of course this is possible, and of course this is the future. This has been demonstrated already: why do you think we even have GPUs at all?! Because we did this exact same transition from running in software to largely running in hardware for all 2D and 3D Computer Graphics. And these LLMs are practically the same math, it's all just obvious and inevitable, if you're paying attent…

I'd be kind of shocked if Nvidia isn't playing with this.

I don't expect it's like super commercially viable today, but for sure things need to trend to radically more efficient AI solutions.

Re: How Taalas “prints” LLM onto a chip?

#137
post #3

This would be a very interesting future. I can imagine Gemma 5 Mini running locally on hardware, or a hard-coded "AI core" like an ALU or media processor that supports particular encoding mechanisms like H.264, AV1, etc. Other than the obvious costs (but Taalas seems to be bringing back the structured ASIC era so costs shouldn't be that low [1]), I'm curious why this isn't getting much attention from larger companies…

Apple should have done this yesterday. A local AI on my phone/Macbook is all I really want from this tech. The cloud-based AI (OpenAI, etc.) are todays AOL.

The die size is huge. This isn’t the kind of chip that would go into your MacBook, let alone an iPhone.

It’s for cloud based servers.

Re: How Taalas “prints” LLM onto a chip?

#138
post #47

Earlier quoted context omitted.

This would be a hell of a hot power bank. It uses about as much power as my oven. So probably more like inside a huge cooling device outside the house. Or integrated into the heating system of the house. (Still compelling!)

*the whole server uses 2.2kw or whatever, not a single board. I think that was for 8 boards or something.

Oh does it? Thanks for the clarification then. Their home page said 2.5kW so I assumed that's what it is.

To be fair, 2.5kW does sound too much for a single 3x3cm chip, it would probably melt.

Re: How Taalas “prints” LLM onto a chip?

#140
post #3

This would be a very interesting future. I can imagine Gemma 5 Mini running locally on hardware, or a hard-coded "AI core" like an ALU or media processor that supports particular encoding mechanisms like H.264, AV1, etc. Other than the obvious costs (but Taalas seems to be bringing back the structured ASIC era so costs shouldn't be that low [1]), I'm curious why this isn't getting much attention from larger companies…

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