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Julia receives DARPA award to accelerate electronics simulation

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Re: Julia receives DARPA award to accelerate electronics simulation

#131
post #110

Earlier quoted context omitted.

> improvements that haven't been published yet to make it work in this domain Are you able to share what some of those are? > You can choose what parameters to fix and which to keep variable over the training process Can you explain more about the parametrization? Do your parameters correspond 1-to-1 with schematic parameters like transistor sizes or resistance/capaciance values? Or internal transistor model paramete…

> Are you able to share what some of those are? The papers are being written, so should be public in a few months, but I can't go into detail quite yet. > Can you explain more about the parametrization? Do your parameters correspond 1-to-1 with schematic parameters like transistor sizes or resistance/capaciance values? Or internal transistor model parameters? Or are they more abstract mathematical parameters? All of…

> Heh, we've actually found some SPICE implementations to have significant numerical issues when compared to our baseline simulator, which has some fancier integrators - I suppose that would make us worse on this metric ;)

Hah. That's not surprising. Our vendors generally mean spectre when they talk about full accuracy, but I have a laundry list of grievances when it comes to spectre and its accuracy settings... What are you using as your baseline?

> Circuit design was my first job

Glad to hear. This industry needs a lot of modernization.

> I have a bit of a hypothesis that - between open source tooling becoming more mature, and more people getting into the chip design space for custom accelerators - we're on the cusp of a major overhaul in EDA tooling

I hope you're right. The current state of circuit EDA tooling is abysmal. I think on the analog/RF side, the ecosystem is so ancient and entrenched that it will take a herculean effort to make any real strides, especially because the golden age of analog/RF semi startups is over. But digital design is very much becoming open source, as you mentioned, and maybe that will eventually bleed over.

I wish all types of circuit design were more accessible to the world - lots of emerging economies could use it, but the up front cost is just so high. There's been a massive surge of software dev recently in the Middle East and Africa, and hopefully hardware dev follows suit.

Re: Julia receives DARPA award to accelerate electronics simulation

#132
post #123

Earlier quoted context omitted.

Very cool paper. Your observations in V.B.4 are pretty well understood in circuit design. If you've not heard of it, you might be interested in https://en.wikipedia.org/wiki/Logical_effort . Turns out the optimum scaling for propagation delay is e (natural log constant), but I don't know if I ever learned anything about the optimum for area. Now that everyone is using finfet processes, the layout part is pretty easy…

> Your observations in V.B.4 are pretty well understood in circuit design. Indeed, I am actually surprised the paper doesn't include something like _"This is inline with the well known result for progressive sizing [cites textbook]"_. It was my first paper, i was worse at writing things then. :-D > One thing your analysis didn't include, which actually ends up being quite significant, is the extra capacitance caused…

> I guess one could maybe introduce explict capacitors and them compute capacitiances by making some assimptions about layout.

That is, in fact, exactly what we do! I think it would be pretty straight forward for your large buffer example - you can model it as a fixed capacitance at each output which corresponds to the routing between inverters, which would be the same for all sizes, plus some scaling capacitance that relates to the size of the transistor itself, which you already have.

The adder would be trickier, for sure. Regardless, in my experience, just adding a reasonable estimate is good enough to get you close in terms of sizing in schematics, then you fine tune the layout.

Re: Julia receives DARPA award to accelerate electronics simulation

#133
post #115

Earlier quoted context omitted.

A lot of semi companies have built their own simulation environments because the EDA vendor's provided tools are very limited in what they can do and difficult to use. Many users go to Python, Excel or MATLAB because the programming/math capabilities of the EDA tools are inadequate. Over time these home-grown environments become a burden and the developer disowns it and it becomes a headache. The EDA tools have no ec…

It's an absolute nightmare. Cadence added support for Matlab calculations on simulator outputs, but its clunky and inconsistent. Don't even get me started on how long it takes to do basic calculations on numbers that should already be in memory...

We are building something along these lines that the DARPA work sits on top of, so if you have a current need, do feel free to reach out (email is in profile).

Re: Julia receives DARPA award to accelerate electronics simulation

#134
I love the goal, and the idea to use Julia. I hope the emphasis on machine learning and AI is for the purposes of the press release, and it's not forced into the core of the project. If it turns out to be a good fit, great. If not, skip it.

Re: Julia receives DARPA award to accelerate electronics simulation

#135

I love the goal, and the idea to use Julia. I hope the emphasis on machine learning and AI is for the purposes of the press release, and it's not forced into the core of the project. If it turns out to be a good fit, great. If not, skip it.

The funding is particularly for AI exploration, but we are building out a strong foundation of modern analog design tooling in julia as well. If the AI works like we hope, it'll be a nice bonus for situations where it is applicable, but I think there is plenty of opportunity to provide value even without it.

Re: Julia receives DARPA award to accelerate electronics simulation

#136

A modern circuit simulator, that has a fully featured programable API, that can be run from a real modern programming language, would be a dream. Every simulator i have used has been pretty limited in that way, or at least those features were not well advertized. Even the insanely expensive ones. I mean the most expensive ones (like $100K liscense type deals, like Cadence) are if anything even less modern from a user…

A lot of semi companies have built their own simulation environments because the EDA vendor's provided tools are very limited in what they can do and difficult to use. Many users go to Python, Excel or MATLAB because the programming/math capabilities of the EDA tools are inadequate. Over time these home-grown environments become a burden and the developer disowns it and it becomes a headache. The EDA tools have no ec…

I can attest first-hand to the "headache" that comes from semi company simulation environments. Not only are they horribly outdated (in Perl/Tcl), but they're different at every company you work at. There's no gold standard because the standard that these EDA companies ought to be making doesn't exist.

There needs to be an open initiative between semi companies to create a standard simulation environment -- with compilers, unit-test frameworks, and all sorts of simulation (gate-level, analog/mixed signal, emulation, etc). Hell, just give me a free IDE plugin for SystemVerilog that actually works.

This lack of a standard seems to me like the critical path in hardware design. I'm trying to support projects to fix this like SVLS (A language server for SystemVerilog: https://github.com/dalance/svls) but these are all hard problems to solve. This industry is relatively niche and doesn't seem to have many engineers interested in FOSS.

Re: Julia receives DARPA award to accelerate electronics simulation

#138
post #40

Earlier quoted context omitted.

As someone that actually uses LTSpice I’ve never considered speed to be an issue. The main draws for it are 1. It’s free unlike Altium addons or orcad p-spice 2. Graphical, I’m happy to code things but code literacy varies widely among EEs. Much easier to share results when it looks like a schematic 3. Good enough component library. The time spent finding and inputting component parameters are gonna be way bigger tha…

LTSpice is my go-to circuit simulator, but I have spent weeks of my waking life waiting on it to run simulations. My current demon is simulating a 1 MW DC power supply to validate current output smoothing solutions in low load scenarios. The topology is a delta-delta and delta-wye transformer, each feeding a summing bridge rectifier, the two rectifiers have their negative legs tied together and the positive legs are…

Oof that's rough. Don't know if it can handle your topology but have you tried LTPowerCAD or TIs equivalent? They did the job when I was doing a boost converter design but I don't remember how capable they were for more complex tasks.

Re: Julia receives DARPA award to accelerate electronics simulation

#139
post #50

I wish BioJulia[1][2] (bioinformatics ecosystem with Julia language) would get a similar attention. Currently, they seem largely underfunded[3]. Global pandemic highlighted importance of such projects, I hope more and more people would participate into the FOSS-based computational biology and medicine. [1] https://biojulia.net/ [2] https://github.com/BioJulia/ [3] https://opencollective.com/biojulia

I'm one of the main developers of BioJulia. I believe our main issue is lack of developer manpower, and not necessarily lack of funds. Of course, if we got enough money to actually employ a developer, that would be amazing. It's just not very realistic. Furthermore, having BioJulia be developed by working scientists has its advantages. If you, or anyone else, is interested in BioJulia, do think about making a contrib…

Are there signs of wider BioJulia adoption? Looks like bio frameworks for Python, Go and even Rust still more popular. Disclaimer: I'm just checking GitHub stars, have no glue what metrics would be more appropriate.
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