DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix • Hacker News Board

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#131

Post by speeder » Tue, Oct 06, 2020, 6:01 PM UTC

TheFlash wrote: post #90

dmead wrote: post #39

Earlier quoted context omitted.

Its 2020 and you're still on a crt?

Eurogamer did write a review about playing modern games on a (very good) CRT monitor [1]. It's better than any LCD and even OLED monitors according to them: [1] https://www.eurogamer.net/articles/digitalfoundry-2019-moder...

Very good that article.

A point not mentioned there but that is a major reason for me to use CRT: Contrast.

The contrast in most flat screens I tried is just terrible, a classic example I use is trying to play Superhot and then watch Game of Thrones right after... Superhot was everything white, so I fiddled with the controls until it was playable.

Then Game of Thrones everything was black. So I fixed it... then went back to Superhot and everything was white again.

With CRT after I adjusted it, I don't need to adjust anymore.

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#132

Post by chungus_khan » Tue, Oct 06, 2020, 6:04 PM UTC

monocasa wrote: post #79

NikolaeVarius wrote: post #53

Earlier quoted context omitted.

That isn't the original point. The PS4 is not natively backward compatible, the base game needs to be ported. Native BC would be 1. It runs native hardware (PS2 EE on Early PS3) 2. It runs without updates required (PS2 running inside emulator on later PS3) This requires actual updates by the dev for individual games to work

Or it's _really_ close, but the systems are complex enough that they feel they need to QA/cert the games again even if the vast majority of games require no changes.

Do shaders on PS4 games ship precompiled? If so, they'll at least need to either recompile those or create some sort of translator (which certainly isn't impossible). Either way, I'm sure even in an ideal situation, Sony wouldn't want to make outlandishly absolute claims like "perfect backwards-compatibility".

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#133

Post by toast0 » Tue, Oct 06, 2020, 6:05 PM UTC

varispeed wrote: post #119

wmf wrote: post #112

Earlier quoted context omitted.

Computers have never used FPGA memory controllers that are upgradeable to newer DRAM standards so there's really no reason to say that's the "proper" solution. And memory standards overlap for 4-5 years which also happens to be the lifetime of a PC so the price/performance benefit of future-proofing really isn't there.

This kind of proves my point. It doesn't lead to maximisation of profits therefore it is not being developed.

How would the increased cost of a FPGA memory controller benefit the end user?

They would still need a new motherboard to use newer memory types, because the modules will have different connectors. They might need a new chipset if the newer memory type wasn't actually addressable with the FPGA (not enough pins, not enough signalling capacity, not enough voltage flexibility, etc).

For the majority of users, they don't change the cpu, motherboard, or memory for the life of the computer (in many cases, some or all of these parts are soldered to the board). Paying more for flexibility that will never be used isn't good for anyone.

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#134

Post by labawi » Tue, Oct 06, 2020, 6:14 PM UTC

extropy wrote: post #113

CyberDildonics wrote: post #75

Earlier quoted context omitted.

Why does it add a latency hop?

At 5ghz, the signals travel only 4 cm each cycle (signal speed in copper is around 60% lightspeed). Moving stuff further away means waiting multiple cycles for a reply.

Random article:

> Power10 chip .. using the DDR4 buffer chip from MicroChip and only adding a mere 10 nanoseconds to memory latency.

At 5GHz that would be 50 cycles or 1m round-trip. The delay is in processing - bridging logical and technical protocols, resynchronization, fanout, probably even a cache layer.

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#135

Post by nine_k » Tue, Oct 06, 2020, 6:17 PM UTC

DCKing wrote: post #76

One thing I'd like to understand better about DDR5 is how well the built-in ECC is going to work to improve reliability. DDR5 comes with "chip level ECC" [1] of which the main purpose is to be able to better sell highly complicated memory chips with minor defects. But as a consequence as I understand, it will allow for the correction of single bit memory flips. With regular DDR4 or previous generations, you don't get…

A number of Celerons 3XXX and 4XXX support ECC. They are intended for storage systems, like a NAS, or industrial electronics.

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#136

Post by wmf » Tue, Oct 06, 2020, 6:25 PM UTC

DCKing wrote: post #115

kasabali wrote: post #88

Earlier quoted context omitted.

What I read around is that's not the enterprise ECC, it's more akin to ECC bits used in flash memory. It'll allow manufacturers to play fast and loose with memory.

I guess what I don't understand then is what big advantage "enterprise ECC" has left over this DDR5 "non-enterprise ECC". (Seriously, why is ECC "enterprise"? Everybody wins with memory error correction.) If regular DDR5 can correct single bitflips, it is on par in correction capabilities with "enterprise ECC" DDR4. Maybe this won't allow for the detection of multiple flips, and maybe won't even report single bit fli…

Most servers have chipkill ECC that can survive an entire 4-bit chip going bad so that's more powerful than classic SECDED. I don't know how often chipkill kicks in though.

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#137

Post by scottlamb » Tue, Oct 06, 2020, 6:27 PM UTC

aresant wrote: post #111

Does anybody have a recommendation for a benchmarking suite that in app shows where your bottlenecks are? eg as simple as CPU utilization, GPU utilization, RAM speed utilization?

Sort of. On Linux, have you tried toplev? https://github.com/andikleen/pmu-tools

It uses CPU performance counters to show things like ITLB_Misses or MEM_Bandwidth. It won't show when you're waiting for GPU/SSD/etc because those aren't visible from CPU performance counters. I'm not aware of a single tool that will do everything, unfortunately.

Also, this isn't a "benchmarking suite"; it's a tool you can use to instrument whatever load you're running, which I'd say is better. It's often used to improve software but could also identify if faster RAM will help.

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#138

Post by smueller1234 » Tue, Oct 06, 2020, 6:29 PM UTC

ksec wrote: post #71

The unanswered question is, will it be cheaper? Price / GB of DRAM hasn't actually fallen much in the 10 years of progression.[1] LPDDR is still over $3/GB. UDIMM is still ~$3 /GB, which is about the same in 2010 / 2011. i.e Despite what you may heard about DRAM price collapse in 2019, the price floor of DRAM has been pretty much the same over the past 10 years. Every other silicon has gotten cheaper, NAND, ICs, just…

Unfortunately I have to disappoint you. DDR5 is expected to be significantly more expensive than DDR4 at a system level, byte for byte.

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#139

Post by filereaper » Tue, Oct 06, 2020, 6:32 PM UTC

To my hardware colleagues on HN, what prevents something similar to Dennard Scaling on DRAMs?

My very naive textbook knowledge is that every bit for DRAM uses up a single transistor and a capacitor, whereas a SRAM cell uses up 6 transistors.

How is it then that with all the scaling so far that traditional SRAMs haven't caught up with DRAM capacities? A single DRAM chip is huge compared to the total die size of any micro-processor.

As the sibling comment asks about cheaper DRAMs, I'm trying to understand how using SRAMs haven't caught up yet from a price/GB perspective.

Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix

#140

Post by verall » Tue, Oct 06, 2020, 6:37 PM UTC

LeifCarrotson wrote: post #121

verall wrote: post #101

Earlier quoted context omitted.

DRAM is not transistors. Transistors have gotten much smaller much faster than DRAM.

The thing that's gotten smaller is the minimum feature size on a silicon wafer. The same types of etching and doping processes can be used to create many integrated circuits. DRAM chips are integrated circuts that consist of individual transistors and capacitors for each bit, plus the wiring and logic to read, refresh, and write to those bits. They're substantially transistors. It's true that logic, power, analog, fl…

> The thing that's gotten smaller is the minimum feature size on a silicon wafer.

No, even minimum feature size is improving much slower than in the past. Fabs are focusing on specifics that are still giving gain: lower power transistors, SRAM. Really high performance transistors like for amps have not gotten much smaller, DRAM has not gotten much smaller, analog has not gotten much smaller.

The capacitors and sense amplifiers in DRAM have not gotten smaller nearly as fast as any of the other features.

> DRAM chips are integrated circuts that consist of individual transistors and capacitors for each bit, plus the wiring and logic to read, refresh, and write to those bits.

I know what a DRAM is...