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Julia receives DARPA award to accelerate electronics simulation

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Re: Julia receives DARPA award to accelerate electronics simulation

#122
post #41

Earlier quoted context omitted.

This is about Julia Computing, the company, not Julia the language.

Maybe they are using Rust, then...

Julia Computing exists to commercialize the Julia language which exists to solve precisely this kind of problem without resorting to a lower-level language. So, probably not.

Re: Julia receives DARPA award to accelerate electronics simulation

#123

Earlier quoted context omitted.

That is an interesting optimization trick, essentially a brute force search over a parameter space in order to minimize silicon area, I am assuming this was for cells that were going to be replicated many times on the same die?

Something like that is the idea. Silicon area is what costs money. Use as little as possible while still being fast enough to beat the clock-rate of your system. PSO's are way better than brute force. but yeah. It was a purely academic work for a masters level CS unit. I had just finished a masters level electrical engineering unit on silicon circuit design. Where the final project was to design an adder that minimiz…

Very cool paper. Your observations in V.B.4 are pretty well understood in circuit design. If you've not heard of it, you might be interested in https://en.wikipedia.org/wiki/Logical_effort. Turns out the optimum scaling for propagation delay is e (natural log constant), but I don't know if I ever learned anything about the optimum for area.

Now that everyone is using finfet processes, the layout part is pretty easy to solve because transistor widths have to be a certain number of fins and the layout is extremely regular.

One thing your analysis didn't include, which actually ends up being quite significant, is the extra capacitance caused by the wires between transistors. This changes the sizing requirements substantially.

I've done some custom logic cell design, and I always had to use a lot of trial and error, though generally I was concerned more with speed than area. I'm not sure exactly what the development process is at my current employer, but it seems like its a lot of manual work. I'm guessing they set area targets based on experience and attempt to maximize speed where possible.

Ultimately, everything gets placed and routed by a computer anyways!

Re: Julia receives DARPA award to accelerate electronics simulation

#125
post #88

Earlier quoted context omitted.

I mean what is the Julia ecosystem focusing on that Rust would not (or similar languages)

Scientific and technical computing. --- Not saying you can't do this stuff in rust. I mean its turing complete. But contrast the description of Rust: A language empowering everyone to build reliable and efficient software. vs Julia Julia is a high-level, high-performance dynamic language for technical computing. Julia is for doing "technical computing". Things like simulations, problems where you need to apply a bunc…

Thanks for clearing. I'm not familiar with Julia' Syntax but I don't doubt its pros over Python. I see why I got unvoted, I think my question was more if Rust (as a metal language) could really help make simulation techs like Julia better than the standards. I don't know.

Re: Julia receives DARPA award to accelerate electronics simulation

#126

A modern circuit simulator, that has a fully featured programable API, that can be run from a real modern programming language, would be a dream. Every simulator i have used has been pretty limited in that way, or at least those features were not well advertized. Even the insanely expensive ones. I mean the most expensive ones (like $100K liscense type deals, like Cadence) are if anything even less modern from a user…

A lot of semi companies have built their own simulation environments because the EDA vendor's provided tools are very limited in what they can do and difficult to use. Many users go to Python, Excel or MATLAB because the programming/math capabilities of the EDA tools are inadequate. Over time these home-grown environments become a burden and the developer disowns it and it becomes a headache. The EDA tools have no ec…

Shameless plug: We are building this over at flux.ai

its early days but you can start playing with our beta

Re: Julia receives DARPA award to accelerate electronics simulation

#127
post #115

Earlier quoted context omitted.

A lot of semi companies have built their own simulation environments because the EDA vendor's provided tools are very limited in what they can do and difficult to use. Many users go to Python, Excel or MATLAB because the programming/math capabilities of the EDA tools are inadequate. Over time these home-grown environments become a burden and the developer disowns it and it becomes a headache. The EDA tools have no ec…

It's an absolute nightmare. Cadence added support for Matlab calculations on simulator outputs, but its clunky and inconsistent. Don't even get me started on how long it takes to do basic calculations on numbers that should already be in memory...

My worst experience was doing a simple min/max of each signal took 7x longer than the simulation. I'd be so happy to toss TCL in the trash. I spent a long time debugging because TCL expr doesn't do -2^2 correctly. The error messages don't tell you the line number and I found no good way to debug. Things like that are just the tip of the iceberg of time wasted fighting with arcane tools. I suppose others have their own stories.

Re: Julia receives DARPA award to accelerate electronics simulation

#128
post #123

Earlier quoted context omitted.

Something like that is the idea. Silicon area is what costs money. Use as little as possible while still being fast enough to beat the clock-rate of your system. PSO's are way better than brute force. but yeah. It was a purely academic work for a masters level CS unit. I had just finished a masters level electrical engineering unit on silicon circuit design. Where the final project was to design an adder that minimiz…

Very cool paper. Your observations in V.B.4 are pretty well understood in circuit design. If you've not heard of it, you might be interested in https://en.wikipedia.org/wiki/Logical_effort . Turns out the optimum scaling for propagation delay is e (natural log constant), but I don't know if I ever learned anything about the optimum for area. Now that everyone is using finfet processes, the layout part is pretty easy…

> Your observations in V.B.4 are pretty well understood in circuit design.

Indeed, I am actually surprised the paper doesn't include something like _"This is inline with the well known result for progressive sizing [cites textbook]"_. It was my first paper, i was worse at writing things then. :-D

> One thing your analysis didn't include, which actually ends up being quite significant, is the extra capacitance caused by the wires between transistors. This changes the sizing requirements substantially.

Good point. And not easy to model in a SPICE style simulator. I guess one could maybe introduce explict capacitors and them compute capacitiances by making some assimptions about layout.

Re: Julia receives DARPA award to accelerate electronics simulation

#129
post #6

Earlier quoted context omitted.

Just curious, what's your current works involves?

I'm a math grad student studying numerics and scientific computing actually. But I do not see a future in it as it does not seem to pay well and the relevant jobs are scarce. So it seems risky to get into it as a career when I can pivot to a more profitable SWE role or do something with ML.

You could certainly choose a few paths that are likely to pay higher salary that most of the scientific computing jobs you'd likely get. On the other hand, the pay for some of those scientific computing jobs is reasonable, and often the work is more interesting for someone with your background. It's worth bearing in mind that unless you are extremely unusual, you'll need a few years training in industry as well before you are really running on all cylinders.

You'll really have to think about your priorities, but it sounds like you have a bit of time to do that.

Probably the worst case is "support programmer for a research lab", some people do well there if they love the lab and the work but it tends to combine poor pay with extremely limited options for professional growth.

Re: Julia receives DARPA award to accelerate electronics simulation

#130

Earlier quoted context omitted.

A long long long time ago, I wrote this (currently very unmaintained, and I have no interest in maintaining) julia project, don't know if this is useful to you, but it's pretty clear that there is a LOT of potential for julia in this domain, though if I'm not mistaken, the HDL-stuff is one level above what you're doing in your project -- it would be nice if these sorts of things could be composable: https://github.co…

We're not doing design in Julia at the moment, just simulation of existing domains, so we're just reading in netlists from other tools. Eventually I do think Julia would be good at HDL, and I too have an abandoned HDL DSL (that I basically used for an FPGA demo and nothing else), but I don't think HDL is an area where Julia would be able to provide 100x improvements over existing tools (which is about where we want t…

you mean quantifiable 100x improvements ;-). Chisel, which I would argue is the best HDL tool, still produces completely inscrutable verilog, so if you don't like the way it does things you might have... a challenge rejiggering it. I imagine there's like "100x" DX improvement you could generate between say best practices on CI, deployment, portability of design, running your design on accelerated hardware with ease, etc.
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