Hacker News Board Hacker News, browsed like a classic message board
Live data from Hacker News

Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

oregonlive.com

Post reply on HN
Print view View original

111–120 of 142 posts

Re: Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

#111

Post by inkyoto »

trollbridge wrote: post #39
jasoneckert wrote: post #6

Earlier quoted context omitted.

Most of the work that goes into chip design isn't related to the ISA per se. So, it's entirely plausible that some talented chip engineers could design something that implements RISC-V in a way that is quite powerful, much like how Apple did with ARM. The biggest roadblock would be lack of support on the software side.

Doesn't RISC-V have a fairly reasonable ecosystem by now?

It has been catching up but is still inadequate, at least from the compiler optimisation perspective.

The lack of high-performance RISC-V designs means that C/C++ compilers produce all-around good but generic code that can run on most RISC-V CPU's, from microcontrollers to a few commercially available desktops or laptops, but it can't exploit high-performance CPU design features of a specific CPU (e.g. exploit instruction timings or specific instruction sequences recommended for each generation). The real issue is that the high-performant RISC-V designs are yet to emerge.

Producing a highly performant CPU is only one part of the job, and the next part requires compiler support, which can't exist unless the vendor publishes extensive documentation that explains how to get the most out of it.

Re: Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

#112

Post by nullc »

jiggawatts wrote: post #99
zackmorris wrote: post #63

I hope they design, build and sell a true 256-1024+ multicore CPU with local memories that appears as an ordinary desktop computer with a unified memory space for under $1000. I've written about it at length and I'm sure that anyone who's seen my comments is sick of me sounding like a broken record. But there's truly a vast realm of uncharted territory there. I believe that transputers and reprogrammable logic chips…

Check out the Azure HBv5 servers. High bandwidth memory on-package with 352 AMD Zen 4 cores! With 7 TB/s memory bandwidth, it’s basically an x86 GPU. This is the future of high performance computing. It used to be available only for supercomputers but it’s trickling down to cloud VMs you can rent for reasonable money. Eventually it’ll be standard for workstations under your desk.

it's kind of concerning that it's only available as a hosted product. Not good news for anyone that needs to run on-prem for confidentiality or availability reasons.

Re: Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

#113

Post by hnaccount_rng »

AtlasBarfed wrote: post #106
zozbot234 wrote: post #59

Earlier quoted context omitted.

> Didn't need to deal with Spectre and Meltdown issues? If we made out-of-order work in ways where much more could be in flight and the compilers / assemblers would know how to avoid stalls based on dependencies, or how to schedule dependencies? What if we took expensive operations, like semaphores / locks, and built solutions in to the chip? I'm pretty sure that these goals will conflict with one another at some poi…

If you have a very large CPU count, then I think you can dedicate a CPU to only process a given designated privacy/security focused execution thread. Especially for a specially designed syscall, perhaps That kind of takes the specter meltdown thing out of the way to some degree I would think, although privilege elevation can happen in the darndest places. But maybe I'm being too optimistic

Isn't the problem the "labelling" of "privacy-sensitive" in the first place?

Re: Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

#114

Post by GregarianChild »

inkyoto wrote: post #110
guywithahat wrote: post #26

As someone who knows almost nothing about CPU architecture, I've always wondered if there could be a new instruction set, better suited to today's needs. I realize it would require a monumental software effort but most of these instruction sets are decades old. RISC-V is newer but my understanding is it's still based around ARM, just without royalties (and thus isn't bringing many new ideas to the table per say)

There are not really any newer instruction sets as we are locked into the von Neumann architecture and, until we move away from it, we will continue to move data between memory and CPU registers, or registers ↭ registers etc, which means that we will continue to add, shift, test conditions of arithmetic operations – same instructions across pretty much any CPU architecture relevant today. So we have: CISC – which is…

Modern GPU instructions are often VLIW and the compiler has to do a lot to schedule them. For example, Nvidia's Volta (from 2017) uses 128-bit to encode each instruction. According to [1], the 128 bits in a word are used as follows:

• at least 91 bits are used to encode the instruction

• at least 23 bits are used to encode control information associated to multiple instructions

• the remaining 14 bits appeared to be unused

AMD GPUs are similar, I believe. VLIW is good for instruction density. VLIW was unsuccessful in CPUs like Itanium because the compiler was expected to handle (unpredictable) memory access latency. This is not possible, even today, for largely sequential workloads. But GPUs typically run highly parallel workload (e.g. MatMul), and the dynamic scheduler can just 'swap out' threads that wait for memory loads. Your GPU will also perform terribly on highly sequential workloads.

[1] Z. Jia, M. Maggioni, B. Staiger, D. P. Scarpazza, Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking. https://arxiv.org/abs/1804.06826

Re: Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

#115

Post by ahartmetz »

Sohcahtoa82 wrote: post #64
johnklos wrote: post #50

One of the biggest problems with CPUs is legacy. Tie yourself to any legacy, and now you're spending millions of transistors to make sure some way that made sense ages ago still works. Just as a thought experiment, consider the fact that the i80486 has 1.2 million transistors. An eight core Ryzen 9700X has around 12 billion. The difference in clock speed is roughly 80 times, and the difference in number of transistor…

> If a Ryzen takes 1,250 times the transistor for one core, does one core run 1,250 times (even taking hyperthreading in to account) faster than an i80486 at the same clock? 500 times? 100 times? Would be interesting to see a benchmark on this. If we restricted it to 486 instructions only, I'd expect the Ryzen to be 10-15x faster. The modern CPU will perform out-of-order execution with some instructions even run in p…

A Ryzen is muuuuch more than 10-15x faster than a 486, and AVX et al do diddly squat for a lot of general-purpose code.

Clock speed is about 50x and IPC, let's say, 5-20x. So it's roughly 500x faster.

Re: Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

#117

Post by joshstrange »

I tire of “Employees from Y company leave to start their own” and even “Ex-Y employees launch new W”.

How many times do we have to see these stories play out to realize it doesn’t matter where they came from. These big companies employee a lot of people of varying skill, having it on your resume means almost nothing IMHO.

Just look at the Humane pin full of “ex-Apple employees”, how’d that work out? And that’s only one small example.

I hope IO (OpenAi/Jony Ive) fails so spectacularly so that we have an even better example to point to and we can dispel the idea that if you did something impressive early in your career or worked for an impressive company, it doesn’t mean you will continue to do so.

Re: Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

#118

Post by PhilipRoman »

smegger001 wrote: post #107
johnklos wrote: post #50

One of the biggest problems with CPUs is legacy. Tie yourself to any legacy, and now you're spending millions of transistors to make sure some way that made sense ages ago still works. Just as a thought experiment, consider the fact that the i80486 has 1.2 million transistors. An eight core Ryzen 9700X has around 12 billion. The difference in clock speed is roughly 80 times, and the difference in number of transistor…

correct me if i am wrong but isn't that what was tried with the Intel Itanium processors line, only the smarter compilers and assemblers never quiet got there. what makes it more likely to work this time?

Optimizing compiler technology was still in the stone age (arguably still is) when Itanium was released. LLVM had just been born and GCC didn't start using SSA until 2005. Egraphs were unheard of in context of compiler optimization.

That said, yesterday I saw gcc generate 5 KB of mov instructions because it couldn't gracefully handle a particular vector size so I wouldn't get my hopes up...

Re: Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

#119

Post by nchmy »

joshstrange wrote: post #117

I tire of “Employees from Y company leave to start their own” and even “Ex-Y employees launch new W”. How many times do we have to see these stories play out to realize it doesn’t matter where they came from. These big companies employee a lot of people of varying skill, having it on your resume means almost nothing IMHO. Just look at the Humane pin full of “ex-Apple employees”, how’d that work out? And that’s only o…

I immediately redflag anyone who advertises themselves as "ex-company". It shows a lack of character, judgment, and, probably, actual results/contributions. Likewise, it shows that they're probably not a particularly independent thinker - they're just following the herd of people who describe themselves like that (whose ven diagram surely overlaps considerably with people who describe themselves as "creatives" - as if a car mechanic working on a rusty bolt or a kindergarten teacher, or anyone else, is not creative.

Moreover, if the ex company was so wonderful and they were so integral to it, why aren't they still there? If they did something truly important, why not just advertise that (and I'm putting aside here qualms about overt advertising rather than something more subtle, authentic, organic).

Re: Top researchers leave Intel to build startup with 'the biggest, baddest CPU'

#120

Post by otabdeveloper4 »

wtallis wrote: post #78
otabdeveloper4 wrote: post #56

Earlier quoted context omitted.

By "GPU" they probably mean "matrix multiplication coprocessor for AI tasks", not actually a graphics processor.

That doesn't really change anything. The use cases for a GPU in any given market segment don't change depending on whether you call it a GPU. And for low-power consumer devices like laptops, "matrix multiplication coprocessor for AI tasks" is at least as likely to mean NPU as GPU, and NPUs are always integrated rather than discrete.

Yes it does change something.

A GPU needs to run $GAME from $CURRENT_YEAR at 60 fps despite the ten million SLoC of shit code and legacy cruft in $GAME. That's where the huge expense for the GPU manufacturer lies.

Matrix multiplication is a solved probelm and we need to implement it just once in hardware. At some point matrix multiplication will be ubiquitous like floating-point is now.

Post reply on HN