111–120 of 209 posts
A16 in 2027 vs Intel's 18A in full swing by 2026 feels like a miss on TMSCs behalf. This looks like an open door for fabless companies to try Intel's foundry service.
>1.6nm Gotta love how we now have fractions of a near meaningless metric.
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>It is my understanding that only ASML had cracked the EUV litography Ackshually , EUV was cracked by Sandia Labs research in the US, with EUV light sources built by Cymer in the US. ASML was the only one allowed to license the tech and integrate it into their steppers after they bough Cymer in 2013. Hence why US has veto rights to whom Dutch based ASML can sell their EUV steppers to, as in not to China, despite ow m…
They don't need anyone else's money. Intel has bought all of TSMC's EUV and High-NA EUV machines for the next several years.
There's no such thing in capitalism. Limited supply semi is(was) a bidding war, where China had a blank cheque and was willing to outbid everyone else to secure semi manufacturing supremacy.
Do you think Intel or TSMC could have scored all that ASML supply at that price if China would have been allowed to bid as well? ASML would have been able to score way higher market prices per EUV stepper had China been allowed in the game, and therefore higher profits.
You think ASML shareholders hate higher profits or what? Nvidia sure didn't during the pandemic. You wanted a GPU? Great, it would cost you now 2x-3x the original MSRP because free market capitalism and the laws of supply and demand.
Comments about the marketing driven nm measurements aside, this still looks like another solid advance for TSMC. They are already significantly ahead of Samsung and Intel on transistor density. TSMC is at 197 MTr/mm2 wile Samsung is at 150 MTr/mm2 and Intel is at 123 MTr/mm2. This 1.6nm process will put them around 230 MTr/mm2 by 2026. When viewed by this metric, Intel is really falling behind.
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Because it lost meaning somewhere between a micron and 100nm. From roughly the 1960s through the end of the 1990s, the number meant printed gate lengths or half-pitch (which were identical). At some point, companies started using "equivalences" which became increasingly detached from reality. If my 50nm node had better performance than your 30nm node because I have FinFETs or SOI or whatever, shouldn't I call mine 30…
The same thing happened with chip frequency around the end of the 1990s. Chip frequencies stagnated (end of Dennard scaling if I remember correctly) giving the impression that single threaded performance had stagnated, but since then chip makers have used increasing data and instruction parallelism to squeeze even more apparent single threaded performance out of chips. A 3ghz chip today is usually way faster on avera…
Chip frequencies didn't detach from the reality. However, as you point out, the performance improved regardless because frequency wasn't the only thing that could be improved.
Another poster summarized what happened with transistor 'density'. New techniques were invented that 'effectively' improved performance, and the industry apparently wanted to continue to use this one number as the basic benchmark.
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Number represents transistor density. 2nm has ~twice the density of 4nm. If you ignore nm as unit of distance it makes sense.
Nope that's what it meant a long time ago. Nowadays, the nm number represents the smallest possible element on the chip, typically the gate length, which is smaller than the size of a transistor. This means that when different manufacturers use a different transistor design, their 'nm' process could be the same but their transistor density different.
It's the same situation as when AMD started putting numbers in their Athlon XP SKUs to tell "this CPU performs just as good as intel of that frequency".
I, for one, think it makes sense. Because as I consumer I don't care about actual transited length or density, all I care about is: performance, efficiency, price. I can assume that going from TSMC N5 to TSMC N3 would result in an increase in efficiency and performance.
People that do care about those things (i.e. electrical engineers) most likely don't use marketing materials...
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No, it's not even related to gate length or any kind of physical feature anymore. It's a purely marketing term. A "3 nm" node has a gate length around 16-18 nm.
OP isn't wrong. Once the switch was made from 2D to 3D gates, transistor numbering became "this is the performance you would expect if you COULD shrink a gate to x nm", and while it's inaccurate it lets people understand how differentiated a new generation is from the previous ones. It also lets them stay consistent with understanding the progression of chips over time as in most of the history of silicon the generat…
We could just divide total gates by surface area for the chip, but that would confuse the process efficiency with the implementation details and then we sacrifice instructions per second for a marketing number.
Sounds like a response to Intel's 18A process [0], which is also coming in 2026. [0] https://www.tomshardware.com/tech-industry/manufacturing/int...
Intel is the one trying to catch up to TSMC, not vice versa! The link you give doesn't have any details of Intel's 18A process, including no indication of it innovating in any way, as opposed to TSMC with their "backside power delivery" which is going to be critical for power-hungry SOTA AI chips.
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You're the one calling it a feature size, not TSMC.
I’m sure you agree that the measurement given is a marketing term and is generally unhelpful beyond ‘it’s smaller than the current number’.