Does anybody have a recommendation for a benchmarking suite that in app shows where your bottlenecks are?
eg as simple as CPU utilization, GPU utilization, RAM speed utilization?
DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
111–120 of 217 posts
Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
#112Earlier quoted context omitted.
I think this makes sense for IBM, but probably not for AMD and Intel. AMD and Intel are putting out new chips every year (even if they're just Skylake refreshes), so it's not too big of a deal to change the memory interface, and they are capable of putting in two flavors of DDR support when some flexibility is needed. For IBM, I don't think they release incremental chip designs each year, so it makes more sense for t…
It is pretty much the current greed driven technology. Company doesn't want to invest in proper FPGA technology that will allow reconfiguration of chipsets on the fly, but instead they want people to buy new chipsets every year or so and preferably make the old ones obsolete (not resellable)
Computers have never used FPGA memory controllers that are upgradeable to newer DRAM standards so there's really no reason to say that's the "proper" solution. And memory standards overlap for 4-5 years which also happens to be the lifetime of a PC so the price/performance benefit of future-proofing really isn't there.
Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
#113Earlier quoted context omitted.
Adds a latency hop, which generally can be dealt with by prefetching and larger caches on the CPU side. There's speculation that AMD is going to do the same - in Zen 2 and later designs the CPU chiplets are coupled with different IO dies depending on the design (Ryzen, Threadripper, Epyc), and swapping out the IO die for one that has support for new/different memory types would less work than taping out a whole new m…
Why does it add a latency hop?
At 5ghz, the signals travel only 4 cm each cycle (signal speed in copper is around 60% lightspeed).
Moving stuff further away means waiting multiple cycles for a reply.
Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
#114Earlier quoted context omitted.
It is easy. For example you could hire 10000 people to perform calculations for your complex mathematical model (like it was done century ago) or you can buy Raspberry PI to perform the same task in no time. Which will be cheaper?
This is a bad comparison. DRAM margins are razor thin and unlike transistors, DRAM has not gotten much smaller, which is the main cost savings gained from process improvements. Instead, server and accelerator vendors want ever faster and higher performance DRAM, and so these performance gains trickle down to consumers, but nothing is driving price down. People on here literally think Moore's is a natural law and if c…
Hasn't the DRAM industry gotten in trouble with regulators multiple times for fixing prices?
Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
#115One thing I'd like to understand better about DDR5 is how well the built-in ECC is going to work to improve reliability. DDR5 comes with "chip level ECC" [1] of which the main purpose is to be able to better sell highly complicated memory chips with minor defects. But as a consequence as I understand, it will allow for the correction of single bit memory flips. With regular DDR4 or previous generations, you don't get…
What I read around is that's not the enterprise ECC, it's more akin to ECC bits used in flash memory. It'll allow manufacturers to play fast and loose with memory.
I guess what I don't understand then is what big advantage "enterprise ECC" has left over this DDR5 "non-enterprise ECC". (Seriously, why is ECC "enterprise"? Everybody wins with memory error correction.) If regular DDR5 can correct single bitflips, it is on par in correction capabilities with "enterprise ECC" DDR4.
Maybe this won't allow for the detection of multiple flips, and maybe won't even report single bit flips to the OS (it'll just fix them silently). I suppose there's no big need to support detection and reporting for the vast majority of use cases. Ryan Smith at Anandtech in the link above says as much: "Between the number of bits per chip getting quite high, and newer nodes getting successively harder to develop, the odds of a single-bit error is getting uncomfortably high. So on-die ECC is meant to counter that, by transparently dealing with single-bit errors."
But for my purposes, if just the correction capabilities are on par with DDR4 ECC I'd be absolutely fine with that. And I guess that goes for many people. Even while using ECC memory now at home, I'm not monitoring the correction statistics and I'm guessing few people do in general. It might as well be silent today if you ask me.
Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
#116Earlier quoted context omitted.
I have a 4690K and my RAM is a 32GB EVGA DDR3 ram that I suspect was made by hynix or the other manufacturer of fast rams, that runs at speed up to par with the slowest DDR4 but with DDR3 latency, it is very awesome. I wonder if DDR5 will be fast enough to compensate for the slower latency (or maybe they improved latency this time?) To be honest I didn't felt yet any need to move off my current machine, I would only…
>that runs at speed up to par with the slowest DDR4 but with DDR3 latency, it is very awesome. AFAIK ddr4 having higher latency than ddr3 is a myth. It has a higher cl number, but that's measured in cycles, so the higher cl number of ddr4 is compensated by its higher clocks. The actual latency (measured in nanoseconds) is about the same, or slightly lower in ddr4 than ddr3.
Anandtech also handled this question:
https://www.anandtech.com/show/16143/insights-into-ddr5-subt...
Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
#117The unanswered question is, will it be cheaper? Price / GB of DRAM hasn't actually fallen much in the 10 years of progression.[1] LPDDR is still over $3/GB. UDIMM is still ~$3 /GB, which is about the same in 2010 / 2011. i.e Despite what you may heard about DRAM price collapse in 2019, the price floor of DRAM has been pretty much the same over the past 10 years. Every other silicon has gotten cheaper, NAND, ICs, just…
I would not be surprised at all if it were to come out that Samsung, Micron, and other major players are price-fixing just like they have been caught doing multiple times in the past. They seem to pay their fines as a cost of doing business and then continue to operate like a cartel. Seems this is the same situation, and I don't doubt this is directly responsible for inflated DRAM pricing.
Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
#118One thing I'd like to understand better about DDR5 is how well the built-in ECC is going to work to improve reliability. DDR5 comes with "chip level ECC" [1] of which the main purpose is to be able to better sell highly complicated memory chips with minor defects. But as a consequence as I understand, it will allow for the correction of single bit memory flips. With regular DDR4 or previous generations, you don't get…
I expect Intel to still cripple some aspect of DDR5 ECC on consumer chips; maybe it will correct errors but the memory controller won't report them. Or maybe it's possible to disable ECC even though it's already implemented. I also expect servers to use two levels of ECC to provide chipkill and also to keep server RAM more expensive than consumer.
Ryan Smith in the link above seems to suggest error correction will be done transparently anyway, so it seems like it won't reported to the OS. So it doesn't look like Intel could cripple it even if they wanted to.
Re: DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
#119Earlier quoted context omitted.
It is pretty much the current greed driven technology. Company doesn't want to invest in proper FPGA technology that will allow reconfiguration of chipsets on the fly, but instead they want people to buy new chipsets every year or so and preferably make the old ones obsolete (not resellable)
Computers have never used FPGA memory controllers that are upgradeable to newer DRAM standards so there's really no reason to say that's the "proper" solution. And memory standards overlap for 4-5 years which also happens to be the lifetime of a PC so the price/performance benefit of future-proofing really isn't there.
This kind of proves my point. It doesn't lead to maximisation of profits therefore it is not being developed.