Earlier quoted context omitted.
> Xilinx tools are free, as in beer This is untrue. [1] > Supporting code is a huge overhead and it's not clear, to me anyway, what Xilinx gains from the expendature. In what world is this the case? You host the project on github or the like and let people contribute bug fixes at the cost of filtering pull requests. Letting the community contribute bug fixes is a huge reason companies open source their tools. [1]: ht…
Most EE EDA/CAD tools are ancient monstrosities of patchwork with a user experience reminiscent of using eclipse 0.01. Full of bugs, lack of fast CLI tools. Everything must start a core process that takes many seconds to even boot. It's ridiculous. Software engineers don't know how good they have it in terms of tools.
How FPGAs work, and why people will buy them (2013)
111–119 of 119 posts
Re: How FPGAs work, and why people will buy them (2013)
#112Earlier quoted context omitted.
1: verilog started as a simulation language. 2: if the tools were open source, people would be free to improve on these bags of pain that we have the pleasure of spending thousands of dollars per license.
So you not only want open source hardware specs but open source existing tools? I don't see intel open sourcing icc, or other software devlopment centric companies open sourcing their IDEs - ao why shoukd FPGA vendors? The original point was allowing open source tools to be developed like gcc, and the response was that it has not happened despite some ground up tools do exist but are very primitive.
To your example, 'I don't see Intel open-sourcing ICC'; while it would be really nice if they did[0], it's not a requirement in the same manner that it wasn't a requirement for gcc to exist.
I could be wrong here -- I do not develop for the FPGA space, however, I've run into similar problems all over the embedded space. Try developing something on one of ARM's Secure MCU products that lands comfortably in just the "open-source software" category (skipping hardware all-together). It's...tricky. To get details on the design of the security features of these products, you have to execute multiple NDAs. And this is in a security space where openness is considered a security feature. In theory, at least, if you interact with one of these NDA-protected features, publishing the source code might be a violation.
Unfortunately, I suspect that many of these features are as good as the secrets that are kept[1] -- exposure of the documentation would likely yield viable attacks[2].
[0] Not the least of which would be to be able to port some of the optimizations that icc enables for Intel processors but disables for AMD/others to be able to be used on...AMD/others.
[1] To clarify, I have not signed any NDAs with ARM, so this is entirely speculation. I'll be a party to one, shortly, so I won't be talking on the subject assuming -- as I suspect -- that doing so would run afoul of the NDA provisions.
[2] At some point the hardware world will learn from Intel and others that security through obscurity ...isn't. As with Intel, as far as we know, the issues they experienced with their management component existed for years without breach. The vulnerability was shockingly bad, was almost certainly known by adversarial governments and black-hats, who kept it a guarded secret as carefully as Intel kept the details of their management component secret. So they succeeded in keeping attackers in business and customers in the dark ... making everyone feel secure.
Re: How FPGAs work, and why people will buy them (2013)
#113Earlier quoted context omitted.
Most EE EDA/CAD tools are ancient monstrosities of patchwork with a user experience reminiscent of using eclipse 0.01. Full of bugs, lack of fast CLI tools. Everything must start a core process that takes many seconds to even boot. It's ridiculous. Software engineers don't know how good they have it in terms of tools.
I started off doing digital design but quickly switched to embedded software after seeing the state of tooling. It's not just the tools themselves either. There are folks who will vehemently defend the way things are and shoot down even the slightest improvement efforts as naïve. With that culture in place, I'm happy just having someone else slap a cortex-mX on a board and programming it with gcc/makefiles/openocd.
Re: How FPGAs work, and why people will buy them (2013)
#114Earlier quoted context omitted.
The keywords are "device-limited". Xilinx WebPack won't build bitstreams for some of the larger and faster devices.
It is deprecated: it won't generate bitstreams for any new FPGA.
Xilinx ISE is indeed deprecated. There are quite a few parts in production which it will still generate bitstreams for, though.
Vivado is the newer replacement. It will not build designs for parts older than 7-series, though, so Xilinx ISE is still required to work with 6-series and older parts, as well as with Xilinx CPLDs.
WebPack licenses are not deprecated. The WebPack program is still active, and will generate limited licenses for both Xilinx ISE and Vivado.
Re: How FPGAs work, and why people will buy them (2013)
#115Earlier quoted context omitted.
Ironically enough, a lot of the people I've cut in the interview process seemed like working their way through Vivado, Lattice, etc. wizards was the only development they had ever done. They could get an env setup, but would be completely lost outside of a trivial hello world style project.
Yeah, we had several interview questions specifically to weed those out too. A favorite was, "How would you design a multiplier, without a wizard/Coregen?" They didn't have to hit everything, but a couple of general multiplier design points - throughout and area? A MAC, or a straight multiplier? Shift add? Do they know enough to try to hit a certain primitive (DSP48E, fast carry chains?). The wizard-only designers fr…
Re: How FPGAs work, and why people will buy them (2013)
#116This article makes me wonder if adding FPGA units to existing CPUs and GPUs that integrate with existing silicon makes a lot more sense than having a completely separate FPGA.
Integration of cpu and fpga has been done for years.
Re: How FPGAs work, and why people will buy them (2013)
#117Earlier quoted context omitted.
Yeah, we had several interview questions specifically to weed those out too. A favorite was, "How would you design a multiplier, without a wizard/Coregen?" They didn't have to hit everything, but a couple of general multiplier design points - throughout and area? A MAC, or a straight multiplier? Shift add? Do they know enough to try to hit a certain primitive (DSP48E, fast carry chains?). The wizard-only designers fr…
I'm current a CompE student and I was wondering what exactly do you look for in new hires, in terms on knowledge and experience?
What I try to do is give candidates a bit of a hand - don't remember UART? What about SPI or I2C? Don't remember either? Ok, how would you design a communication block that looks like this (SPI).
I ask fundamental questions- what's synthesis? What's place and route? Explain timing to me. What underlies the logic minimization at the heart of FPGAs? There are a lot of questions to ask - I try to keep moving if a candidate gets nervous so that I can focus in on something that they can answer. For a lot of young people, especially tech types, if you can get them "on a roll" with something they did or were excited by, their anxiety will drop away and they'll do better. Generally we want to see what you know, but also how you think.
For more senior candidates, I take a similar approach - but I'm trying to identify weaknesses. So instead of a glide path to another problem, I'll use your answer to identify a weakness. Gave a marginal answer about something? Ok, let's see how they handle a hypothetical about pipelining, clock domain crossings, timing violations, block level design, proper reset usage, etc. We have a few questions about math implementations, timing violations, etc that are in our stable as well that have proven to be real destroyers.
There is a fundamental understanding about space, memory, and time that a good candidate will be able to grapple with that a marginal one won't - "Design two versions of this block - a small one, and a higher performance one, in broad strokes. Discuss the difference between them". - Area, throughout, latency.
Also: Show up on time. Do your best. Stay positive. Admit what you don't know. Ask questions when you're stuck. Try to learn something while you're there.
If you can find someone in the industry that is willing to do interview prep with you, do it. When I just got started, somebody sat with me and did mock interviews. It helped me a lot, so I try to pay it forward by doing that for my interns to help them get into the industry.
It's a great time to be in the game. Learn all you can, develop your passion for it, and you'll do great.
Re: How FPGAs work, and why people will buy them (2013)
#118Earlier quoted context omitted.
I'm current a CompE student and I was wondering what exactly do you look for in new hires, in terms on knowledge and experience?
We use an internship program - the best indicators seem to be a lot of undergrad courses in digital design (like 4 or 5 of them), the ability to talk about a project you did that used digital design and what your process was and what you learned, and then some small coding or design problem everyone should have seen. "Build a block that outputs a 1 when it sees the pattern 1100100" - you should know what a finite sta…
Re: How FPGAs work, and why people will buy them (2013)
#119Earlier quoted context omitted.
It is deprecated: it won't generate bitstreams for any new FPGA.
You're mixing up WebPack (which is a licensing plan for some of Xilinx's tools) and Xilinx ISE (which is one of those specific tools). Xilinx ISE is indeed deprecated. There are quite a few parts in production which it will still generate bitstreams for, though. Vivado is the newer replacement. It will not build designs for parts older than 7-series, though, so Xilinx ISE is still required to work with 6-series and o…