https://newsroom.intel.com/editorials/envision-world-thunder...
All AMD ThreadRipper CPU's will have 64 PCIe Lanes
111–120 of 144 posts
Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes
#112Earlier quoted context omitted.
Consumers tend to be limited by not having many PCIe SSDs in RAID0? Who are these people and what do they need galactic disk bandwidth for?
I've been shopping for a future proof workstation (10Gbps Ethernet 8x + 2 16x video cards) that couldn't quite fit on a Xeon E3.
Considering how hard Intel is pushing Thunderbolt it makes little sense how hard they're gimping their consumer and workstation CPU's when it comes to PCIe support.
Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes
#113Any word from AMD on support for Thunderbolt 3, now Intel are making it available royalty-free? https://newsroom.intel.com/editorials/envision-world-thunder...
> next year Intel plans to make the Thunderbolt protocol specification available to the industry under a nonexclusive, royalty-free license.
no point in AMD saying anything at this point.
Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes
#114Salient point: > all 64 lanes being enabled for all ThreadRipper SKUs. This will be broken up into 60+4: 60 lanes directly from the CPU for feeding PCIe and M.2 slots , and then another 4 lanes going to the chipset And > the 16 core processor will for most purposes be half of an Epyc processor Epyc (formerly Naples) is the server-grade arch with 8 memory channels, 32 cores and 128 PCIe lanes per socket.
>32 cores >128 PCIe lanes Well shit... what am I going to do with this pair of useless Xeon E5s I just bought?
Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes
#115Earlier quoted context omitted.
Consumers tend to be limited by not having many PCIe SSDs in RAID0? Who are these people and what do they need galactic disk bandwidth for?
Enthusiasts tend to be gamers, and once you have a high end machine, most games tend to be limited on disk bandwidth, which affects load times. By consumers, I meant enthusiasts, since that's who the Threadripper (X399) and Intel's Extreme Edition (X299) platforms are aimed at.
Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes
#116Earlier quoted context omitted.
As with most things the devil is in the details. In particular the ARM I/O and memory bus infrastructure has not had as long to develop as PC systems have. The trick to understanding that is to look at the history of the personal computer and the demands placed on the CPU and supporting chipset that evolved with the changing demands of the platform over time. The ARM systems evolved from 'system on chip' or SoC desig…
The owner of ARM is now using it in the fastest computer in the world, with perhaps the fastest interconnect and memory IO subsystem to match.
Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes
#117Disappointing, I thought, especially because in addition to extra two cores I now sport a quad-channel DDR RAM. Well, turns out that compiling my Go projects does not generate enough "hot" threads, and the Linux scheduler keeps moving them around between 6 cores, letting the cores to "cool down" and drop to 1.2Ghz idle frequency. Meanwhile the 4-core box is happily spinning at 3.4-3.8Ghz during the compile cycle.
The only way to make the 6-core box to perform was to enable "performance" policy for intel_pstate which leads to the CPU running at its full speed even at idle (not great). Once I did that I saw the performance increase by 50%.
Here are the compile times of the same project on both machines with different CPU frequency scaling policies:
governor/cpu 4-core 3.4Gz 6-core 3.3Ghz
------------ ------------- --------------
standard 13 sec 15 sec
performance 11 sec 9 sec
As far as I know, AMD does not have an equivalent of intel_pstate in Linux kernel and relies on legacy ACPI governor which isn't as sophisticated as Intel's (where the CPU is more self-regulating) and I wonder what kind of effects to expect in regards to performance / power consumption if I go for Ryzen.Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes
#118Before you get excited about unleashing the power of 16 cores on your desktop... I have recently upgraded from the 4-core to 6-core i7 with roughly the same frequency/turbo and noticed that compile times have actually increased. Disappointing, I thought, especially because in addition to extra two cores I now sport a quad-channel DDR RAM. Well, turns out that compiling my Go projects does not generate enough "hot" th…
go build main.go &
go build main.go &
go build main.go &
go build main.go &
go build main.go &
go build main.go &
/s
Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes
#119Before you get excited about unleashing the power of 16 cores on your desktop... I have recently upgraded from the 4-core to 6-core i7 with roughly the same frequency/turbo and noticed that compile times have actually increased. Disappointing, I thought, especially because in addition to extra two cores I now sport a quad-channel DDR RAM. Well, turns out that compiling my Go projects does not generate enough "hot" th…
Solution: Keep all CPU's active. go build main.go & go build main.go & go build main.go & go build main.go & go build main.go & go build main.go & /s
Does go not support parallel build jobs? If so then he should be setting the count to six instead.
Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes
#120Earlier quoted context omitted.
A lot of processing happens when games load. Once you have sufficient storage bandwidth and latency, load times flatten out. It seems that "sufficient" is SATA; above that, there is little difference in game load times: https://techreport.com/review/29221/samsung-950-pro-512gb-ss...
I wonder if game developers are actually disincentivized from qualitatively improving load times past a certain acceptable threshold, lest their AAA game be perceived as lightweight.