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Developer Preview – EC2 Instances with Programmable Hardware

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Re: Developer Preview – EC2 Instances with Programmable Hardware

#111
post #2

If you don't click through to read about this: you can write an FPGA image in verilog/VHDL and upload it... and then run it. To me that seems like magic. HDK here: https://github.com/aws/aws-fpga (I work for AWS)

So it's tied to the PCIe bus - how do you interact with your FPGA once you programmed it - are there general drivers you can use, or do you also have to create a linux driver to talk to your FPGA ?

Re: Developer Preview – EC2 Instances with Programmable Hardware

#114
I'm surprised that no one has linked to http://opencores.org/ opencores yet. They've got a ton of vhdl code under various open licenses. The project's been around since forever and is probably a good place to start if you're curious about fpga programming.

Re: Developer Preview – EC2 Instances with Programmable Hardware

#115
post #42
post #9

Earlier quoted context omitted.

I guess this will be a game changer for FPGA-mineable digital currencies. Maybe not for Bitcoin, because people have invested heavily into dedicated mining hardware, but I'm interested to see what it'll do for the smaller altcoins.

For any cryptocurrency that's profitably mineable on AWS the difficulty immediately increases to the point that it's no longer profitable.

Yes, this IMO is the biggest flaw in bitcoin's design. It makes miners impossible to commoditize. As soon as a new ASIC becomes widely available, it defeats itself and becomes useless at the next difficulty increase.

Consumer ASICs stopped being a thing for this reason. Now we have mega-secret custom hardware that can't be shared without destroying the investment put into their development.

I don't think Satoshi's intention was that only a handful of massive investors with their own proprietary chipsets would be able to mine, but that's the natural consequence of the difficulty mechanism, and it really undermines bitcoin's core principle of decentralization.

Re: Developer Preview – EC2 Instances with Programmable Hardware

#116
post #8

For my institute this is going to be _really_ useful for Genomics data processing because we can't justify buying expensive hardware for undergrad research. Using a FPGA hardware over cloud sounds almost magical!

You can't justify buying it but you can justify renting it? Has your department heard of amortization?

Most research finance departments are absolutely horrified at OpEx because any strange non-capital expenditure makes them look less efficient than the next research institute. This comes in handy when two labs are up for a grant, and they are equally qualified. The more efficient institute gets the grant. You can imagine asking for the lab credit card for EC2 time is not met with enthusiasm.

Re: Developer Preview – EC2 Instances with Programmable Hardware

#117
I'm a total FPGA n00b, so here's a dumb question: what can you do with this FPGA that you can't with a GPU?

OK, here's a concrete question: I have a vector of 64 floats. I want to multiply it with a matrix of size 64xN, where N is on the order of 1 billion. How fast can I do this multiplication, and find the top K elements of the resulting N-dimensional array?

Re: Developer Preview – EC2 Instances with Programmable Hardware

#119

I'm a total FPGA n00b, so here's a dumb question: what can you do with this FPGA that you can't with a GPU? OK, here's a concrete question: I have a vector of 64 floats. I want to multiply it with a matrix of size 64xN, where N is on the order of 1 billion. How fast can I do this multiplication, and find the top K elements of the resulting N-dimensional array?

I can't answer the GPU comparison question, but I can answer the question of what you "can" do on a FPGA. Here are some example cores for FPGAs: http://opencores.org/projects

Hopefully, by browsing that list, you can see how FPGAs aren't really directly comparable to something like a GPU.

Re: Developer Preview – EC2 Instances with Programmable Hardware

#120
post #66

The traditional EDA tool companies (Mentory, Cadence, Synopsys) all tried offering their tools under a could/SaaS model a few years back and nobody went for it. Chip designers are too paranoid about their source code leaking. I wonder if that attitude will hamper adoption of this model as well?

Chip designers are too paranoid about their source code leaking.

It's more an issue of being able to reproduce an existing build later on. You can't delegate ownership of the toolchain to the "cloud" (read: somebody else's computer) if you think you'll ever need to maintain the design in the future.

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