Live data from Hacker News

AMD claims Arm ISA doesn't offer efficiency advantage over x86

techpowerup.com

101–110 of 446 posts

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#101
post #71

Earlier quoted context omitted.

Yes and yes - again, go look at the published results.

I have, the m4 is significantly ahead by any measure I’ve seen, with snapdragon just behind. https://www.xda-developers.com/tested-apple-m4-vs-intel-luna...

The m4 is not the same fab technology so not comparable. If you want to discuss the validity of some CPU architecture it needs to be between comparable fab technology, M4 being a generation ahead there makes the comparison unfair.

If you compare like to like the difference almost completely disappears.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#102
post #20

This is an entirely uncontroversial take among experts in the space. x86 is an old CISC-y hot mess. RISC-V is a new-school hyper-academic hot mess. Recent ARM is actually pretty good. And none of it matters, because the uncore and the fabrication details (in particular, whether things have been tuned to run full speed demon or full power sipper) completely dominate the ISA. In the past x86 didn't dominate in low powe…

This matches my understanding as well, as someone who has a great deal of interest in the field but never worked in it professionally. CPUs all have a microarchitecture that doesn't look like the ISA at all, and they have an instruction decoder that translates ISA one or more ISA instructions into zero or more microarchitectural instructions. There are some advantages to having a more regular ISA, such as the ability…

Then there's mainframes. Where you want code compiled in 1960 to run unmodified today. There was quite of original advantage as well as IBM was able to implement the same ISA with three different types and costs of computers.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#105
post #84

Earlier quoted context omitted.

I have a hard time believing this fully: more custom instructions, more custom hardware, more heat. How can you avoid it?

Since the Pentium Pro the hardware hasn't implemented the ISA, it's converted into micro ops.

Come on, you know what I meant :)

If you want to support AVX e.g. you need 512bit (or 256) wide registers, you need dedicated ALUs, dedicated mask registers etc.

Ice Lake has implemented SHA-specific hardware units in 2019.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#106
post #91
post #73

Earlier quoted context omitted.

Isn't it also easier to license ARM, because that's the whole point of the ARM Corporation. It's not like Intel or AMD are known for letting other customize their existing chip designs.

Apple was a very early investor in ARM and is one of the few with a perpetual license of ARM tech

[deleted]

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#107

Earlier quoted context omitted.

I remember reading this Jim Keller interview: https://web.archive.org/web/20210622080634/https://www.anand... Basically the gist of it is that the difference between ARM/x86 mostly boils down to instruction decode, and: - Most instructions end up being simple load/store/conditional branch etc. on both architectures, where there's literally no difference in encoding efficiency - Variable length instruction has pretty…

Variable length decoding is more or less figured out, but it takes more design effort, transistors and energy. They cost, but not a lot, relatively, in a current state of the art super wide out-of-order CPU.

Not a lot is not how I would describe it. Take a 64bit piece of fetched data. On ARM64 you will just push that into two decoder blocks and be done with it. On x86 you got what, 1 to 15 bytes range per instruction? I dont even want to think about possible permutations, its in the 10 ^ some two digit number order.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#108

This is an entirely uncontroversial take among experts in the space. x86 is an old CISC-y hot mess. RISC-V is a new-school hyper-academic hot mess. Recent ARM is actually pretty good. And none of it matters, because the uncore and the fabrication details (in particular, whether things have been tuned to run full speed demon or full power sipper) completely dominate the ISA. In the past x86 didn't dominate in low powe…

>RISC-V is a new-school hyper-academic hot mess.

Yeah... Previously I was a big fan of RISC-V, but after I had to dig slightly deeper into it as a software developer my enthusiasm for it has cooled down significantly.

It's still great that we got a mainstream open ISA, but now I view it as a Linux of the hardware world, i.e. a great achievement, with a big number of questionable choices baked in, which unfortunately stifles other open alternatives by the virtue of being "good enough".

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#109
Of course, because saying that X ISA is faster than Y ISA is like saying that Java syntax is faster than C# syntax

Everything is about the implementation: compiler, JIT, runtime/VM, stdlib, etc.

https://chipsandcheese.com/p/arm-or-x86-isa-doesnt-matter

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#110
post #16

Irrelevant. There are two entities allowed to make x86_64 chips (and that only because AMD won the 64 bit ISA competition, otherwise there'd be only Intel). They get to choose. The rest will use arm because that's all they have access to. Oh, and x86_64 will be as power efficient as arm when one of the two entities will stop competing on having larger numbers and actually worry about power management. Maybe provide a…

AMD do handle power consumption well, at least if you run in eco mode instead of pushing CPU to the limits. I always set eco mode on on modern Ryzens.
Post reply on HN