Earlier quoted context omitted.
You can't choose where you're from, but you can choose where you go afterwards.
Arizona seems a particularly bad place to choose freely. Fabs consume enormous quantities of water and Arizona (and the sw) are already in precarious position, and not even a semi viable theoretical option like desalination possible in the future
TSMC 2nm Process Disclosure – How Does It Measure Up?
101–106 of 106 posts
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#102Earlier quoted context omitted.
Arizona seems a particularly bad place to choose freely. Fabs consume enormous quantities of water and Arizona (and the sw) are already in precarious position, and not even a semi viable theoretical option like desalination possible in the future
There must be something Intel, TSMC, and NXP (fmr. Motorola) saw in the area to build several fabs there.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#103Earlier quoted context omitted.
Arizona seems a particularly bad place to choose freely. Fabs consume enormous quantities of water and Arizona (and the sw) are already in precarious position, and not even a semi viable theoretical option like desalination possible in the future
There must be something Intel, TSMC, and NXP (fmr. Motorola) saw in the area to build several fabs there.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#104Earlier quoted context omitted.
There must be something Intel, TSMC, and NXP (fmr. Motorola) saw in the area to build several fabs there.
The water is recycled
A sweeping statement, like plastic is recycled. It is more complex than that.
It is energy intensive (and expensive) to recycle both low purity and ultra pure water (UPW) used and for some fabs it is just 40% [1] and there is no consistent globally adopted solution, most of the tech used is still evolving and not implemented everywhere.
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#105Earlier quoted context omitted.
The first Intel product on 18A is the "Panther Lake" CPU for laptops. According to what Intel claims, it will be launched in H2 2025, i.e. with commercial availability either in October or in December, depending on how quickly Intel will succeed to improve the yields of the 18A process.
Who's running the show now that Gelsinger is out?
Re: TSMC 2nm Process Disclosure – How Does It Measure Up?
#106Earlier quoted context omitted.
Jetson Nano was manufactured using the 20nm node as far as I can see[1]. Just goes to show manufacturing node isn't everything. There's a lot of various optimizations one can do depending on targets. Guess we'll just have to see what the future brings. [1]: https://en.wikipedia.org/wiki/Tegra#Tegra_X1
The latest orin modules are 4nm I'm pretty sure.