Execution units are often pipelined

Post by ajross » Fri, Jan 03, 2025, 6:46 PM UTC

wtallis wrote: post #77

ajross wrote: post #64

Earlier quoted context omitted.

> VLIW is again a different thing. No it isn't. I'm being very deliberate here with refusing pedantry. In practice , "multiple dispatch" means "OO" in the same way that "VLIW" means "parallel in order dispatch". Yes, you can imagine hypothetical CPUs that mix the distinction, but they'd be so weird that they'd never be built. Discussing the jargon without context only confuses things. > you can have, for example, a c…

> Note that the Pentium had two defined pipes with specific rules about how the pairing was encoded in the instruction stream. It was, in practice, a VLIW architecture (just one with a variable length encoding and where most of the available instruction bundles only filled one slot)! This is ridiculous. There are no nop-filled slots in the instruction stream, and you can't even be sure which instructions will issue t…

Meh. P5's decode algorithm looks very much like VLIW to me, and emphatically not like the 21264/P6 style of dispatch that came to dominate later. I find that notable, and in particular I find senseless adherence to jargon definitions[1] hurts and doesn't help in this sphere. Arguing about how to label technology instead of explaining what it does is a bad smell.

[1] That never really worked anyway. ia64, Transmeta's devices and Xtensa HiFi are all "VLIW" by your definition yet work nothing like each other.

Post by ajross » Fri, Jan 03, 2025, 6:47 PM UTC

gpderetta wrote: post #68

ajross wrote: post #64

Earlier quoted context omitted.

> VLIW is again a different thing. No it isn't. I'm being very deliberate here with refusing pedantry. In practice , "multiple dispatch" means "OO" in the same way that "VLIW" means "parallel in order dispatch". Yes, you can imagine hypothetical CPUs that mix the distinction, but they'd be so weird that they'd never be built. Discussing the jargon without context only confuses things. > you can have, for example, a c…

I'm sorry, but if P5 was VLIW then the word has lost all meanings. They couldn't possibly be more different.

The point was exactly that "VLIW" as a term has basically no meaning. What it "means" in practice is parallel in-order dispatch (and nothing about the instruction format), which is what I said upthread.

Re: Execution units are often pipelined

Re: Execution units are often pipelined