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I found a bug in Intel Skylake processors

gallium.inria.fr

101–104 of 104 posts

Re: I found a bug in Intel Skylake processors

#103
post #66

Earlier quoted context omitted.

I don't disagree with you, but then use EAX, not AH (which would also produce a smaller code as you don't need to use a 64-bit constant) Optimizing for size is good, but what GCC did there made sense in the 32-bit days, but not that much today Some code snippets use AH/AL as 2 separate registers hence the processor might rename them to different internal registers. But then when reading EAX the processor needs to upd…

TFA says clang actually uses an encoding of AND which operates on RAX but takes only 32b of constant so it is pretty much the solution you propose. And BTW, operating directly on EAX itself fucks up the upper half of RAX.

AFAIK it is standard for all 64-bit instructions that use immediates.

Re: I found a bug in Intel Skylake processors

#104
post #103
post #66

Earlier quoted context omitted.

TFA says clang actually uses an encoding of AND which operates on RAX but takes only 32b of constant so it is pretty much the solution you propose. And BTW, operating directly on EAX itself fucks up the upper half of RAX.

AFAIK it is standard for all 64-bit instructions that use immediates.

Interesting, it seems you are right and no 64b immediates are possible at all except in MOV.
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