Looks like a perfect backing device for /dev/null
/dev/random gets all the attention, it's high time for a /dev/null hardware implementation.
The Real Story of the Write-Only-Memory
11–17 of 17 posts
Re: The Real Story of the Write-Only-Memory
#12"Lawson’s contributions too as he was a real comedian with lots of semiconductor experience. He could have invented the WOM concept. He did invent the “SCROM”. I doubt if any one else knows what that is. I’ll add later." "SCROM" must mean Self-Clear Read-Only Memory?
Re: The Real Story of the Write-Only-Memory
#13Minor typo, or anachronistic use of early 21st Century slang that suggests time traveller activity?
Re: The Real Story of the Write-Only-Memory
#14"The line-up consisted simply of six hydrocoptic marzul vanes so fitted to the ambaphascient lunar wain shaft that side fumbling was effectively prevented."
Ahhh, classic.
Re: The Real Story of the Write-Only-Memory
#15Reminds me of the retro encabulator (which was actually a video, not a data sheet) https://www.youtube.com/watch?v=NpnEiOOfu1Q "The line-up consisted simply of six hydrocoptic marzul vanes so fitted to the ambaphascient lunar wain shaft that side fumbling was effectively prevented." Ahhh, classic.
Re: The Real Story of the Write-Only-Memory
#16Though admittedly this isn't something I've done for a number of years, IIRC both the VGA and the original Sound Blaster had write-only registers which you would use to request some change in state, and some other registers that would reflect the actual current state of the device if/when the request was honoured.
Of course these are not write-only in the sense that nothing can read their contents, since they are provided as an interface to some coprocessor like a GPU or a sound chip. That coprocessor can of course read the incoming data. They are more like the hardware equivalent of mutator methods on top of private properties.
Re: The Real Story of the Write-Only-Memory
#17The concept of WOM isn't completely pointless for non von Neumann architectures, and could even be useful for von Neumann-esque SPMD or MPMD systolic array ( http://en.wikipedia.org/wiki/Systolic_array ) architectures that have strict execution models forced in the core to core wiring. While not completely free form, you would still have instructions and data being stored in the same space, it would be only readable…