11–20 of 39 posts
> Without CPUs, we can be freed from the tyranny of the halting problem. Can someone please explain to me what this even means in this context? Serious question.
https://news.ycombinator.com/item?id=36074287
You could say he had a history of using big words to talk shit.
I don’t understand the LLVM comparison. Is it somehow a compiler backend for conventional programming languages? Can you run C or Rust code?
I don’t understand the LLVM comparison. Is it somehow a compiler backend for conventional programming languages? Can you run C or Rust code?
If I understand him correctly, if everything becomes a neural network then he expects most neural networks to use Tinygrad
No, I do not think future devices will be "boot to neural network." Traditional algorithms still have a place. Your robot vacuum cleaner (his example) may still use A* to route plan, and Quicksort to display your cleanings in terms of most energy usage.
> Without CPUs, we can be freed from the tyranny of the halting problem.
Not sure what this means but I think it still makes sense to have a CPU directing things as in current architectures. You don't just have your neural engine, you also have your GPU, Audio system, input devices, etc. and those need a controller. Something needs to coordinate.
> Without CPUs, we can be freed from the tyranny of the halting problem. Can someone please explain to me what this even means in this context? Serious question.
Essentially, he wants to be able to express programs, and even an operating system, as a directed acyclic graph of logical binary operations, so that you can have consistent and deterministic runtime behavior.
The bit about LLMs is a distraction, in my opinion.
> Without CPUs, we can be freed from the tyranny of the halting problem. Can someone please explain to me what this even means in this context? Serious question.
TinyGrad is GeoHot's system/compiler to map neural networks onto hardware. He consistently points out this one point: Because the exact number of cycles is know in advance, it can be scheduled, there's no need for branch prediction, or that type of thing in a CPU. Essentially, he wants to be able to express programs, and even an operating system, as a directed acyclic graph of logical binary operations, so that you c…
So how is this different from digital logic synthesis for CPLD/FPGA or chip design we have been doing over the last decades?