Simple question, but the article doesn’t define this: what does “NA” mean here, and what do the does increasing NA from 0.33 to 0.55 mean? The gist I got from the article was “bigger number better” but I have no idea what these actually mean.
ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
11–20 of 69 posts
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#12Simple question, but the article doesn’t define this: what does “NA” mean here, and what do the does increasing NA from 0.33 to 0.55 mean? The gist I got from the article was “bigger number better” but I have no idea what these actually mean.
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#13Simple question, but the article doesn’t define this: what does “NA” mean here, and what do the does increasing NA from 0.33 to 0.55 mean? The gist I got from the article was “bigger number better” but I have no idea what these actually mean.
https://www.asml.com/en/technology/lithography-principles/le....
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#14Earlier quoted context omitted.
These observations while good are probably old news (about a decade old) by now. The US has viewed tech as strategic and a realm of competition with China since at least the late Obama admin (so 2015 or so). Semicon as a key strategic goal for China is regularly mentioned in their 5 year plans in an extremely public way. The US has leaned heavily on ASML to go along with export restrictions against China, along with…
You are making the situation sound much less precarious than it is. The reality is that the US has only really done something in the last few years, and those changes and attempts to hedge will take a very long time to materialize. Odds are the US and Europe will never enjoy the comparative advantage Taiwan has in the semiconductor supply chain. What does that mean? One of the west’s key strategic advantages is the a…
Considering AMD, Nvidia, Supermicro and many others are all headed by Taiwanese CEOs etc I think this has more of an influence than otherwise. The community and ecosystem was built way before anyone saw it as a thing.
Japan had no chance with the conglomerates like Fujitsu still stuck in their ways.
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#15Earlier quoted context omitted.
These observations while good are probably old news (about a decade old) by now. The US has viewed tech as strategic and a realm of competition with China since at least the late Obama admin (so 2015 or so). Semicon as a key strategic goal for China is regularly mentioned in their 5 year plans in an extremely public way. The US has leaned heavily on ASML to go along with export restrictions against China, along with…
You are making the situation sound much less precarious than it is. The reality is that the US has only really done something in the last few years, and those changes and attempts to hedge will take a very long time to materialize. Odds are the US and Europe will never enjoy the comparative advantage Taiwan has in the semiconductor supply chain. What does that mean? One of the west’s key strategic advantages is the a…
That's such a silly statement, and completely taking away the ingenuity of the Taiwanese. Taiwan(and Korea)'s semiconductor rise came specifically because the US hammered Japan's semiconductor industry in hopes of taking over their market share. It also happened in part, because the US massively attacked the RoC(Taiwan) nuclear industry, which left a lot of those engineers without a future, add on top of that a national strategy that caused two different strategies between UMC, TSMC.
This is a culmination of heavy engineering focus in Government, higher education and national support, along with a market gap created by clobbering the dominant player in the industry at the time.
What the US is doing right now does the opposite. It creates a market gap in the industry due to Taiwan being completely beholden to the US. The only reason for the rise in domestic semiconductor production and supply chain in China is specifically because the US tried to restrict China's access to these goods and in turn inadvertently created a similar situation for Taiwan that it did for Japan 1986. Leaders with cooler heads like the Mediatek CEO acknowledged as much and warned that this is what is going to happen.
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#16https://www.eetimes.com/wp-content/uploads/ASML-slide-one.pn... This is a very fun subsystem diagram.
What's nuts to me is the time scale on the bottom. That is not a lot of time for something so complex. Then again, if they do an Intel 10nm+++++ and fail to maintain velocity even for a couple of years, their competition will close that gap very quickly.
(Serious question: I am just getting into the semiconductor world and haven’t found any competitors yet)
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#17Earlier quoted context omitted.
I’m not sure Intel and Samsung are behind TSMC to the extent that switching to their CPUs would be, like, catastrophic. There’s a big advantage to using the newest node because people who buy iPhone want to be assured that their iPhones were made using the best, newest tech. But a 2 year old iPhone is not totally junk, it actually is still a much more powerful computer than almost anybody really needs. TSMC has huge…
> I’m not sure Intel and Samsung are behind TSMC Intel is trying to catch up but Samsung just has no idea. Samsung spent years poaching, merging and sniffing trade secrets to survive. Problem with Intel is that most of it is Intel specific (still)
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#18Earlier quoted context omitted.
What's nuts to me is the time scale on the bottom. That is not a lot of time for something so complex. Then again, if they do an Intel 10nm+++++ and fail to maintain velocity even for a couple of years, their competition will close that gap very quickly.
Who are their real competitors? They’ve been buying parts of the supply chain recently - they seem to have a real moat unless regulation gets involved (Serious question: I am just getting into the semiconductor world and haven’t found any competitors yet)
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#19Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#20Earlier quoted context omitted.
Who are their real competitors? They’ve been buying parts of the supply chain recently - they seem to have a real moat unless regulation gets involved (Serious question: I am just getting into the semiconductor world and haven’t found any competitors yet)
There are none in the sense that all high volume production of high-end chips uses ASML. With the possible exception of what Huawei is doing.