11–20 of 93 posts
I wish they dug into how this monstrosity is powered. Assuming 1V and 24kW, that's 24kAmps.
and cooling! Imagine the heat sink on that thing. Would look like a cast-iron Dutch oven :)
I wish they dug into how this monstrosity is powered. Assuming 1V and 24kW, that's 24kAmps.
and cooling! Imagine the heat sink on that thing. Would look like a cast-iron Dutch oven :)
- non-sparse fp16 in WSE-2 was 7.5 tflops (about 8 H100s, 10x worse performance per dollar)
Does anyone know the WSE-3 numbers? Datasheet seems lacking loads of details
Also, 2.5 million USD for 1 x WSE-3, why just 44GB tho???
https://f.hubspotusercontent30.net/hubfs/8968533/Virtual%20B...
https://www.cerebras.net/blog/whats-new-in-r0.6-of-the-cereb...
"CSL allows for compile time execution of code blocks that take compile-time constant objects as input, a powerful feature it inherits from Zig, on which CSL is based. CSL will be largely familiar to anyone who is comfortable with C/C++, but there are some new capabilities on top of the C-derived basics."
- Interconnect between WSE-2's chips in the cluster was 150GB/s, much lower than NVIDIA's 900GB/s. - non-sparse fp16 in WSE-2 was 7.5 tflops (about 8 H100s, 10x worse performance per dollar) Does anyone know the WSE-3 numbers? Datasheet seems lacking loads of details Also, 2.5 million USD for 1 x WSE-3, why just 44GB tho???
Earlier quoted context omitted.
and cooling! Imagine the heat sink on that thing. Would look like a cast-iron Dutch oven :)
The one of the videos posted here gets into that: https://news.ycombinator.com/item?id=39693930 : https://vimeo.com/853557623
"We call it the engine block because it somewhat resembles a three cylinder motorcycle engine"
(referring to the power distribution and cooling)
Not trying to sound critical, but is there a reason to use 4B,000 vs 4T?
original title is: "4,000,000,000,000 Transistors, One Giant Chip (Cerebras WSE-3)" So I guess they're trying to stay true to it.