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Core to core latency data on large systems

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Re: Core to core latency data on large systems

#11

Post by hinkley »

bee_rider wrote: post #5

The NUMA nature of recent* chips has made me wonder if there’s ever going to be a movement to start using message passing libraries (like MPI) on shared memory machines. * actually, not even that recent, Zen planted this hope in my brain.

I keep thinking that Rust’s borrow semantics would be pretty good for hinting whether code should run on the same core or could be offloaded to another. Two modules that only communicate via small, read only messages could easily be on separate cores.

And on architectures where some cores share faster paths than others, gradations could be scheduled that way.

Re: Core to core latency data on large systems

#12

Post by hinkley »

I was misreading these charts for too long. Maybe I still am.

Am I seeing that none of these processors implement a toroidal communication path? I thought that was considered basic cluster topology these days so I’m surprised that multi core chips don’t implement it.

Re: Core to core latency data on large systems

#13

Post by adapteva »

bee_rider wrote: post #5

The NUMA nature of recent* chips has made me wonder if there’s ever going to be a movement to start using message passing libraries (like MPI) on shared memory machines. * actually, not even that recent, Zen planted this hope in my brain.

Ten years too early....

https://parallella.org/2015/05/25/how-the-do-i-program-the-p...

Re: Core to core latency data on large systems

#14

Post by wmf »

adapteva wrote: post #13
bee_rider wrote: post #5

The NUMA nature of recent* chips has made me wonder if there’s ever going to be a movement to start using message passing libraries (like MPI) on shared memory machines. * actually, not even that recent, Zen planted this hope in my brain.

Ten years too early.... https://parallella.org/2015/05/25/how-the-do-i-program-the-p...

Nope, Parallela was the wrong thing at the time and it's still wrong. Cache is good.

Re: Core to core latency data on large systems

#15

Post by loxias »

jauntywundrkind wrote: post #2

It'll be interesting to see how CXL shakes out. It might end up being not much more than cross socket access! 150ns to go between sockets is about what we see here & is in the realm of what CXL had been promising. Having a super short lightweight protocol like CXL.mem to talk over such fast fabric has so much killer potential. These graphs are always such a delight to see. It's a network map, of how well connected co…

I, too, am excited for CXL. Not enough people got to _feel_ the awesome of pmem. I think if more people had, pmem would be in all our laptops, desktops, servers.

Re: Core to core latency data on large systems

#17

Post by RedlineTriad »

nvartolomei wrote: post #6
bee_rider wrote: post #5

The NUMA nature of recent* chips has made me wonder if there’s ever going to be a movement to start using message passing libraries (like MPI) on shared memory machines. * actually, not even that recent, Zen planted this hope in my brain.

Thread-per-core software architectures are doing this https://penberg.org/papers/tpc-ancs19.pdf Real world examples are scylladb and Redpanda, both built on the seastar framework (C++ https://seastar.io/message-passing/ ). And for rust there is glommio https://www.datadoghq.com/blog/engineering/introducing-glomm...

There is also another thread-per-core implementation by ByteDance (TikTok) for Rust called Monoio with benchmarks[0] comparing it to Tokio and Glommio.

[0] https://github.com/bytedance/monoio/blob/master/docs/en/benc...

Re: Core to core latency data on large systems

#18

Post by sapiogram »

nvartolomei wrote: post #6
bee_rider wrote: post #5

The NUMA nature of recent* chips has made me wonder if there’s ever going to be a movement to start using message passing libraries (like MPI) on shared memory machines. * actually, not even that recent, Zen planted this hope in my brain.

Thread-per-core software architectures are doing this https://penberg.org/papers/tpc-ancs19.pdf Real world examples are scylladb and Redpanda, both built on the seastar framework (C++ https://seastar.io/message-passing/ ). And for rust there is glommio https://www.datadoghq.com/blog/engineering/introducing-glomm...

Does thread per core necessarily imply message passing? I don't see why the two need to be related.

Re: Core to core latency data on large systems

#19

Post by rewmie »

wmf wrote: post #14
adapteva wrote: post #13

Earlier quoted context omitted.

Ten years too early.... https://parallella.org/2015/05/25/how-the-do-i-program-the-p...

Nope, Parallela was the wrong thing at the time and it's still wrong. Cache is good.

> Nope, Parallela was the wrong thing at the time and it's still wrong.

Can you elaborate?

Re: Core to core latency data on large systems

#20

Post by zozbot234 »

adgjlsfhk1 wrote: post #9
bee_rider wrote: post #5

The NUMA nature of recent* chips has made me wonder if there’s ever going to be a movement to start using message passing libraries (like MPI) on shared memory machines. * actually, not even that recent, Zen planted this hope in my brain.

IMO, MPI is the wrong level to do this on. Most apps should either be using some form of mapreduce or not using parallelism beyond the numa node.

The map-reduce programming model is overly simplified. It cannot express useful primitives such as prefix scan, which is used all the time in parallel algorithms.
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