Verilog to Minecraft Redstone Synthesizer • Hacker News Board

Re: Verilog to Minecraft Redstone Synthesizer

#11

Post by NoodleIncident » Tue, Nov 24, 2020, 6:41 PM UTC

pampa wrote: post #3

unsigner wrote: post #2

This is so Greg Egan. (An Australian sci-fi author who likes to layer realities computed/simulated on top of each other - give Diaspora or Permutation City if it sounds like your cup of tea.)

Speaking of Greg Egan. Is it just me, or is the ending of Diaspora somewhat anticlimactic? There are so many interesting ideas he touches upon without exploring them in depth and then the narrative loses steam and dies of.

I don't think the ending was intended to act as a climax to the narrative. Rather, it's the logical conclusion of several ideas shown earlier in the story; modifications to how you think that can't be reversed; alien consciousnesses that you can never actually communicate with; the logical conclusion of the original quest to prolong humanity's simulated existence, which is why they go exploring in the first place.

Re: Verilog to Minecraft Redstone Synthesizer

#12

Post by waste_monk » Wed, Nov 25, 2020, 4:49 AM UTC

cmrdporcupine wrote: post #4

This is very cool, and I wonder if I could work something like this into a way to teach my (10 year old) son the basics of digital logic. In his case I suspect the full syntax of Verilog would be overkill and just add confusion, though. A simpler subset without modules and with only continuous assignment would be ideal. Gears turning.

Not sure if it would be suitable for a 10yo, but check out MHRD (on steam or itch.io), you start out with NAND gates and gradually build more complex constructs that you reuse in the following levels, where the final level is a (very simple) CPU. Sort of like the first few parts of Nand2Tetris.

It uses a very simple HDL, has a reasonable IDE built in, and each puzzle is pass/fail based on a test suite so it's easy to get into - however, you only have a certain number of lines on screen in which to write the HDL (and comments), so brute force is not an option for most of the puzzles, you do have to optimise your design to fit the constraints.

Re: Verilog to Minecraft Redstone Synthesizer

#13

Post by 2fast4you » Wed, Nov 25, 2020, 6:08 AM UTC

waste_monk wrote: post #12

cmrdporcupine wrote: post #4

This is very cool, and I wonder if I could work something like this into a way to teach my (10 year old) son the basics of digital logic. In his case I suspect the full syntax of Verilog would be overkill and just add confusion, though. A simpler subset without modules and with only continuous assignment would be ideal. Gears turning.

Not sure if it would be suitable for a 10yo, but check out MHRD (on steam or itch.io), you start out with NAND gates and gradually build more complex constructs that you reuse in the following levels, where the final level is a (very simple) CPU. Sort of like the first few parts of Nand2Tetris. It uses a very simple HDL, has a reasonable IDE built in, and each puzzle is pass/fail based on a test suite so it's easy to…

I second this, MHRD was a very good intro for me