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ZRNA – Software-defined analog circuits

zrna.org

11–20 of 26 posts

Re: ZRNA – Software-defined analog circuits

#11
post #4

> We achieve this with the union of a field-programmable analog array (FPAA), an ARM processor and state-of-the-art firmware. An FPAA is similar in concept to a field-programmable gate array, but instead of logic elements, it is composed of analog elements: opamps, comparators, capacitors and switches. These fundamental elements are used to build higher level modules like filters, oscillators and gain stages. Is it g…

The specs on the op amps aren't particularly impressive. The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz). You can find discrete parts with similar specs for sub-$1. It's a neat idea and all but when it comes to the analog design space there is a lot more variables to consider and constraints that drive them. Your average FPGA on the other hand is able to synthesize mul…

>The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz).

I am not sure what this implies; would you be able to build an equivalent, digital circuit (with presumably a ADC and a DAC stage) with an average AVR then? Or what's the clock comparison for?

Re: ZRNA – Software-defined analog circuits

#12
post #10
post #4

Earlier quoted context omitted.

The specs on the op amps aren't particularly impressive. The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz). You can find discrete parts with similar specs for sub-$1. It's a neat idea and all but when it comes to the analog design space there is a lot more variables to consider and constraints that drive them. Your average FPGA on the other hand is able to synthesize mul…

Sure, but analog processing happens continuously and at an SNR that is equivalent to a very high bit depth. If you had an analog processing chain with 18MHz of BW (which granted you'd need somewhat more GBP), that would be more akin to a digital system that can produce output samples at 40Msps+. If each output sample needed even just a few dozen processing clocks to compute, you're already looking at a 500MHz+ clock.…

> analog processing happens continuously and at an SNR that is equivalent to a very high bit depth

16 bits is roughly 100dB, and achieving more than that is usually a serious engineering challenge. I'd like to see crosstalk rejection numbers for this system.

There are people working in the other direction, trying to use analogue for implementing the calculations of neural nets, and they tend to target the equivalent of 8 bit depth.

Re: ZRNA – Software-defined analog circuits

#15

I'm divided on this. It's hard for me to figure out what this hardware is actually good for, and particularly in which use cases it beats FPGAs. As far as I can see, FPGAs or DSP-cores in MCUs/processors seem to be the real competitor, and the question will be at what sampling rate a DSP solution will outperform whatever this ZRNA does. And on top of that, the API looks quite understandable, so it may be easier to us…

It would potentially be good for audio applications. Analog oscillator and filter emulation is actually quite processor intensive and is never perfect, always has aliasing.

Re: ZRNA – Software-defined analog circuits

#16

I'm divided on this. It's hard for me to figure out what this hardware is actually good for, and particularly in which use cases it beats FPGAs. As far as I can see, FPGAs or DSP-cores in MCUs/processors seem to be the real competitor, and the question will be at what sampling rate a DSP solution will outperform whatever this ZRNA does. And on top of that, the API looks quite understandable, so it may be easier to us…

It's undoubtedly aimed at musical audio generation and signal processing. A quick search will reveal the number of gotchas in implementing even a simple alias-free (bandlimited interpolation) digital sawtooth wave, never mind arbitrary wave tables. The rebirth of analog audio synths was partially driven by the complex behaviors of real analog circuitry - particularly when you account for saturation, hysteresis and other "imperfections" that don't occur naturally in a digital simulation.

Re: ZRNA – Software-defined analog circuits

#17
post #4

> We achieve this with the union of a field-programmable analog array (FPAA), an ARM processor and state-of-the-art firmware. An FPAA is similar in concept to a field-programmable gate array, but instead of logic elements, it is composed of analog elements: opamps, comparators, capacitors and switches. These fundamental elements are used to build higher level modules like filters, oscillators and gain stages. Is it g…

The specs on the op amps aren't particularly impressive. The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz). You can find discrete parts with similar specs for sub-$1. It's a neat idea and all but when it comes to the analog design space there is a lot more variables to consider and constraints that drive them. Your average FPGA on the other hand is able to synthesize mul…

> The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz).

Analog constraints are much different than digital ones. If you're expecting to do anything on the 18MHz range you wouldn't be looking at this product.

But in practice I'd doubt you would be using it for anything > 100kHz, maybe 1MHz. Which is absolutely fine for most applications this is intended.

If you're really targeting anything analog > 1MHz you really should know what you're getting into, and you wouldn't be looking at a board like this.

Re: ZRNA – Software-defined analog circuits

#18
post #4

Earlier quoted context omitted.

The specs on the op amps aren't particularly impressive. The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz). You can find discrete parts with similar specs for sub-$1. It's a neat idea and all but when it comes to the analog design space there is a lot more variables to consider and constraints that drive them. Your average FPGA on the other hand is able to synthesize mul…

>The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz). I am not sure what this implies; would you be able to build an equivalent, digital circuit (with presumably a ADC and a DAC stage) with an average AVR then? Or what's the clock comparison for?

The unit gain (for an OpAmp at least) is related to the bandwidth, the gain decreases linearly (in the dB scale) as the frequency goes up.

You want to be looking at the -3dB range to know +/- the actual useful bandwidth

Re: ZRNA – Software-defined analog circuits

#19
post #4

Earlier quoted context omitted.

The specs on the op amps aren't particularly impressive. The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz). You can find discrete parts with similar specs for sub-$1. It's a neat idea and all but when it comes to the analog design space there is a lot more variables to consider and constraints that drive them. Your average FPGA on the other hand is able to synthesize mul…

If you know nothing about circuits, this looks cool. I guess there's always the hobby Blinkenlight crowd.

The concept of a field-programmable-ANALOG-array (FPAA) bubbles up to the surface every once in a while. I think it's a neat idea with some interesting use-cases.

Motorola had an FPAA product back in the 90's, but it never gained market traction and was aimed primarily at education.

I wonder now that FPGA's have gotten so powerful and large if it isn't possible to just simulate specific analog parts and "wire" them together into "analog circuits" to rapidly prototype analog designs? This would be different from simulation on a computer because the simulated analog FPGA circuit could actually be used, evaluated and tweaked in the field. Then, when the design is mature one could realize it using actual analog components.

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