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The CADR Microprocessor

lm-3.github.io

11–17 of 17 posts

Re: The CADR Microprocessor

#11
Important bit of historical context is that "micro" in "microprocessor" in this case refers to fact, that it is microcoded, not that it is implemented as single VLSI chip.

Re: The CADR Microprocessor

#12
Reading these historic documents always gives me an itch to "OK. What would a CADR look today?" myself into designing a contemporary version with wider addresses, registers and so on. Of course, I never finish.

Re: The CADR Microprocessor

#13
post #11

Important bit of historical context is that "micro" in "microprocessor" in this case refers to fact, that it is microcoded, not that it is implemented as single VLSI chip.

Indeed. The first single VLSI chip implementation of a Lisp machine, the MegaChip, was done by Texas Instruments in 1987 for its Explorer II workstations. This chip contained 553000 transistors and was afaik very similar to the CADR architecture-wise. Symbolics, one of TI's competitors, released their own VLSI Lisp machine chip next year called the Ivory, which had a more advanced architecture (labeled the I-Machine in the documentation) that used less transistors for its implementation than the MegaChip, only around ~300k.

Re: The CADR Microprocessor

#14
post #13
post #11

Important bit of historical context is that "micro" in "microprocessor" in this case refers to fact, that it is microcoded, not that it is implemented as single VLSI chip.

Indeed. The first single VLSI chip implementation of a Lisp machine, the MegaChip, was done by Texas Instruments in 1987 for its Explorer II workstations. This chip contained 553000 transistors and was afaik very similar to the CADR architecture-wise. Symbolics, one of TI's competitors, released their own VLSI Lisp machine chip next year called the Ivory, which had a more advanced architecture (labeled the I-Machine…

The somewhat large transistor counts are understandable taking into account that the CADR CPU is mostly an insane (for the time) amount of SRAM (as in hundreds of 1k and 4k chips) coupled to comparatively small logic.

Re: The CADR Microprocessor

#15
post #11

Important bit of historical context is that "micro" in "microprocessor" in this case refers to fact, that it is microcoded, not that it is implemented as single VLSI chip.

Is in fact it was a massive wire-wrapped machine

Re: The CADR Microprocessor

#16
post #7
post #5

Looks interesting, but I'm too ignorant to understand it... What is the practical significance of this? Is this the design for the processor that was used in the actual Lisp Machines, or a design for a hypothetical processor?

it's the architecture of the original lisp machine from which all other lisp machines (arguably) derive, mit's CADR. there's not many of them built, since it was made by hand wiring, but there's still one or two around in a working state. for reference here's the ai memo write up of the project http://dspace.mit.edu/handle/1721.1/5718 dated 1979, which should place it in a historic context for you

They were wire-wrapped but by robot.

Re: The CADR Microprocessor

#17
post #16
post #7

Earlier quoted context omitted.

it's the architecture of the original lisp machine from which all other lisp machines (arguably) derive, mit's CADR. there's not many of them built, since it was made by hand wiring, but there's still one or two around in a working state. for reference here's the ai memo write up of the project http://dspace.mit.edu/handle/1721.1/5718 dated 1979, which should place it in a historic context for you

They were wire-wrapped but by robot.

ty
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