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Silicon die analysis: inside an op amp with interesting “butterfly” transistors

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Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#11

Post by lpmay »

jacquesm wrote: post #8
raverbashing wrote: post #5

Funny, I have actually used this one, the 4 means 4 OPAMPs in a single chip. IIRC there's also the TL082 with 2 OPAMPs. Much more performant than the 741 (might have to do with 2 things: the 741 came early and was one of the pioneers and it is BJT only) It's also curious how the the big butterfly transistors are at the input, components with a big die size are usually big for a reason (usually power). One extra fact,…

> usually power That may be true but I'm not sure it applies in this context. Another valid reason is because at a larger scale it is easier to get the dimensions to be within a fairly close tolerance of the counterpart and hence to get two parts that function well in tandem. Matched pairs and current mirrors are exactly the right situations for this and so they tend to be oversized, even if that slows the parts down…

Also, the input stage is where noise figure is critical. Larger transistors are lower noise figure.

Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#12

Post by kens »

bogomipz wrote: post #10

I have a few questions about the JFET diagram and JFETs in general if someone wouldn't mind answering: In the graphic we see S, G and D - Source Gate and Drain. Is the source permanently connected to power? If so do all transistor in a circuit connect to a shared power rail? Must voltage always be present on both the source and gate in order for current to flow to the drain? Lastly when the transistor is switched "on…

> Is the source permanently connected to power? If so do all transistor in a circuit connect to a shared power rail?

Looking at the TL084 schematic, the JFET source is fed from another transistor (a current source in a current mirror). Some of the transistors are connected to V++ and some are connected to V-- but many of them are not connected directly to any power rail.

> Must voltage always be present on both the source and gate in order for current to flow to the drain?

There has to be a voltage differential between the source and the drain for current to flow. JFETs are "normally on" and get pinched off as the voltage differential between the gate and source increases.

> Lastly when the transistor is switched "on" does voltage leaving the drain then become input for a gate of some neighboring transistor in the circuit?

Voltage doesn't really leave the drain, but the drain is connected to the base of another transistor, part of the second state of the op amp, where most of the amplification happens. In other words, the output of the differential pair is the input to the next amplifier stage.

Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#13

Post by bogomipz »

kens wrote: post #12
bogomipz wrote: post #10

I have a few questions about the JFET diagram and JFETs in general if someone wouldn't mind answering: In the graphic we see S, G and D - Source Gate and Drain. Is the source permanently connected to power? If so do all transistor in a circuit connect to a shared power rail? Must voltage always be present on both the source and gate in order for current to flow to the drain? Lastly when the transistor is switched "on…

> Is the source permanently connected to power? If so do all transistor in a circuit connect to a shared power rail? Looking at the TL084 schematic, the JFET source is fed from another transistor (a current source in a current mirror). Some of the transistors are connected to V++ and some are connected to V-- but many of them are not connected directly to any power rail. > Must voltage always be present on both the s…

Thank you for the detailed reply.

Would these last two points also apply to MOSFETs?

In the case of a MOSFET there obviously wouldn't be a "next amplifier stage" but would the output voltage be input to the next transistor's source or the next transistor's gate maybe?

Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#14

Post by PhantomGremlin »

ebikelaw wrote: post #2

While you marvel at this circuit remember that it was invented decades ago, for many purposes it is still state-of-the-art, and it costs fifteen cents.

Not only invented decades ago, but built decades ago. The "7949" on the chip means it was manufactured in the 49th week of 1979. Which is nearly 39 years ago.

He's lucky to find a part like that. Today nobody is going to build a device in a 14-pin ceramic package and sell it for 15 cents.

Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#15

Post by ttul »

amelius wrote: post #9

Could a genetic algorithm have come up with this design? (Electronics seems an interesting application area for automated design, since the search space is relatively small)

I modern chip design, simulated annealing is used for placement of parts to minimize the length of routes and optimize parasitic effects.

Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#16

Post by jstanley »

ebikelaw wrote: post #2

While you marvel at this circuit remember that it was invented decades ago, for many purposes it is still state-of-the-art, and it costs fifteen cents.

I sometimes wonder whether integrated-circuit manufacturing wasn't sent to us by time-travellers from the future. Our ability to manufacture useful things, on such tiny scales, to such high precision, doesn't seem to match up with our comparatively-poor capabilities in other areas of manufacturing.

Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#17

Post by vvanders »

jstanley wrote: post #16
ebikelaw wrote: post #2

While you marvel at this circuit remember that it was invented decades ago, for many purposes it is still state-of-the-art, and it costs fifteen cents.

I sometimes wonder whether integrated-circuit manufacturing wasn't sent to us by time-travellers from the future. Our ability to manufacture useful things, on such tiny scales, to such high precision, doesn't seem to match up with our comparatively-poor capabilities in other areas of manufacturing.

There's a series on transistors that covers this. There's basically no mechanical process since everything is done via etching and litho. Leads to the results you see.

Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#18

Post by ebikelaw »

PhantomGremlin wrote: post #14
ebikelaw wrote: post #2

While you marvel at this circuit remember that it was invented decades ago, for many purposes it is still state-of-the-art, and it costs fifteen cents.

Not only invented decades ago, but built decades ago. The "7949" on the chip means it was manufactured in the 49th week of 1979. Which is nearly 39 years ago. He's lucky to find a part like that. Today nobody is going to build a device in a 14-pin ceramic package and sell it for 15 cents.

That's a good point. The die in the SOIC package (the one that costs 15 cents) probably is smaller? Which means it might also have a different layout.

Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#19

Post by phaet0n »

Does anyone have a good reference on how analog is done on logic processes, specifically the bits that have to interface off the chip, like gpio, lvds, and serdes. I'd much appreciate it.

There's something I once encountered, but can't find the reference to, that suggested a kind of "digital-analog" process whereby voltage levels were replaced by timing measurement (?) due to the limits of feature size in analog design. I'm not in the field so forgive my ignorance.

Re: Silicon die analysis: inside an op amp with interesting “butterfly” transistors

#20

Post by kens »

phaet0n wrote: post #19

Does anyone have a good reference on how analog is done on logic processes, specifically the bits that have to interface off the chip, like gpio, lvds, and serdes. I'd much appreciate it. There's something I once encountered, but can't find the reference to, that suggested a kind of "digital-analog" process whereby voltage levels were replaced by timing measurement (?) due to the limits of feature size in analog desi…

I don't know about modern chips, but 1970s and 1980s logic chips just used big MOSFETs to drive their outputs. There wasn't any weird timing magic going on.

There are also processes like analog BiCMOS that let you mix bipolar analog circuitry and CMOS on the same chip. I also wrote recently about the 76477 sound chip that combined I2L logic with bipolar analog circuits.

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