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IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

arstechnica.co.uk

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Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#11

Post by b34r »

igravious wrote: post #7
elorant wrote: post #2

So, what happens when we reach 1nm? Can we go even lower or we'd need a paradigm shift?

1nm isn't a special number just because it is 1. A nm is one billionth of a metre which itself is an arbitrary length so 1nm is a purely arbitrary cut-off. What you should be asking is how many molecules of silicon and silicon-germanium can be packed into the spaces being talked about at the different fabrication levels of 14nm, 10nm, 7nm, 5nm, and so on. Once you have that information then you can ask what is the sm…

According to my very unscientific googling, a silicon atom is approximately 111 picometers, or just over 1/10 of a nanometer. So if we can make stable gates with only 3-4 Si atoms, we can definitely go below 1nm.

Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#12

Post by davidiach »

igravious wrote: post #7
elorant wrote: post #2

So, what happens when we reach 1nm? Can we go even lower or we'd need a paradigm shift?

1nm isn't a special number just because it is 1. A nm is one billionth of a metre which itself is an arbitrary length so 1nm is a purely arbitrary cut-off. What you should be asking is how many molecules of silicon and silicon-germanium can be packed into the spaces being talked about at the different fabrication levels of 14nm, 10nm, 7nm, 5nm, and so on. Once you have that information then you can ask what is the sm…

>All I know is that 1nm is not a magic number and that predictions about the demise of transistor scaling have always turned out to be wrong. My prediction is that, as unimaginable as it seems, we'll be able to scale down to the physical limits of the materials.

This is very important to be pointed out. The burden of proof should be on the people who suggest that "this time it is different", not on those who correctly assumed that technology tends to progress in time.

Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#13

Post by tormeh »

hyperpallium wrote: post #10
gbrown_ wrote: post #3

Earlier quoted context omitted.

We're not likely to get below 3nm. We getting into the realm of making things on a feature set of a handful of atoms. It's insane we've got this far. Then there's the matter of using this for production of large scale shipping chips. Note the POWER9 (IBM's next big chip) is expected to be produced on 14nm. > we'd need a paradigm shift? Yes we're coming to the end of the road for traditional CMOS chips. I don't think…

14nm? Wait, isn't the iPhone 8's A11 to be on 10nm? I can't imagine TSMC being ahead of IBM's foundry, so what's going on here? Non-technical "nm"?

Coarser processes have their benefits, especially when they've matured for a while. When you're building a large chip you start really thinking about yield. Coarser and more mature processes give better yield.

I would assume that maximum yield would be achieved by very accurate machinery making coarse chips, like using 14nm lithography to make 22nm chips, but this is rarely done in practice, I think.

Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#14

Post by halomru »

ant6n wrote: post #8
igravious wrote: post #7

Earlier quoted context omitted.

1nm isn't a special number just because it is 1. A nm is one billionth of a metre which itself is an arbitrary length so 1nm is a purely arbitrary cut-off. What you should be asking is how many molecules of silicon and silicon-germanium can be packed into the spaces being talked about at the different fabrication levels of 14nm, 10nm, 7nm, 5nm, and so on. Once you have that information then you can ask what is the sm…

> we'll be able to scale down to the physical limits of the materials. So that's like 1nm?

Somewhere between 0.1nm and 1nm.

Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#15

Post by Someone »

hyperpallium wrote: post #10
gbrown_ wrote: post #3

Earlier quoted context omitted.

We're not likely to get below 3nm. We getting into the realm of making things on a feature set of a handful of atoms. It's insane we've got this far. Then there's the matter of using this for production of large scale shipping chips. Note the POWER9 (IBM's next big chip) is expected to be produced on 14nm. > we'd need a paradigm shift? Yes we're coming to the end of the road for traditional CMOS chips. I don't think…

14nm? Wait, isn't the iPhone 8's A11 to be on 10nm? I can't imagine TSMC being ahead of IBM's foundry, so what's going on here? Non-technical "nm"?

http://spectrum.ieee.org/semiconductors/devices/the-status-o...:

"The company’s 0.13-µm chips, which debuted in 2001, had transistor gates that were actually just 70 nm long. [...] Through all this, node name numbers continued to drift ever downward, and the density of transistors continued to double from generation to generation. But the names no longer match the size of any specific chip dimension. “The minimum dimensions are getting smaller,” Bohr says. “But I’m the first to admit that I can’t point to the one dimension that’s 32 nm or 22 nm or 14 nm. Some dimensions are smaller than the stated node name, and others are larger.”

The switch to FinFETs has made the situation even more complex. Bohr points out, for example, that Intel’s 22-nm chips, the current state of the art, have FinFET transistors with gates that are 35 nm long but fins that are just 8 nm wide."

If there wasn't such an enormous difference between the two, I bet some foundries would have silently started reporting transistor sizes in nautical miles (nm) in order to ensure the number kept decreasing.

Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#16

Post by kurthr »

I wish this wasn't so laughable. What this really shows is that IBM has high margins for their chips, and a long standing tolerance for absurdly low yields and long wafer turn times. That they announce "production" before any of the other fabs is more likely do to PR needs than real technical advancement. https://arstechnica.com/gadgets/2015/07/ibm-unveils-industry...

EUV has been available for years and no doubt TSMC and SS have their own EUV test chips at 7nm (comparable to Intel 10nm), but the EUV equipment business will be validated by large orders and $ spent, not on prototype silicon. We aren't there yet (but probably will be in a year or so- they've gone from 100W to 150W in the last 9months and need to hit 200-250W).

Will we have 1-3nm transistors? Yes. Will they be commercially viable? Probably No.

Moore's law ends when the CFOs decide it's not worth building another multi-$B factory on schedule based on net expected return... which already happened over the last 4 years. Sorry, downvote at will.

Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#17

Post by [deleted] »

kurthr wrote: post #16

I wish this wasn't so laughable. What this really shows is that IBM has high margins for their chips, and a long standing tolerance for absurdly low yields and long wafer turn times. That they announce "production" before any of the other fabs is more likely do to PR needs than real technical advancement. https://arstechnica.com/gadgets/2015/07/ibm-unveils-industry... EUV has been available for years and no doubt TSM…

[deleted]

Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#18

Post by undersuit »

kurthr wrote: post #16

I wish this wasn't so laughable. What this really shows is that IBM has high margins for their chips, and a long standing tolerance for absurdly low yields and long wafer turn times. That they announce "production" before any of the other fabs is more likely do to PR needs than real technical advancement. https://arstechnica.com/gadgets/2015/07/ibm-unveils-industry... EUV has been available for years and no doubt TSM…

>Will we have 1-3nm transistors? Yes. Will they be commercially viable? Probably No.

Why not? We can only stack our layers so much, eventually the 1-3nm range of transistors will become useful to give technology another squeeze before having to learn how to layer a bizarre number of layers.

Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#19

Post by microcolonel »

undersuit wrote: post #18
kurthr wrote: post #16

I wish this wasn't so laughable. What this really shows is that IBM has high margins for their chips, and a long standing tolerance for absurdly low yields and long wafer turn times. That they announce "production" before any of the other fabs is more likely do to PR needs than real technical advancement. https://arstechnica.com/gadgets/2015/07/ibm-unveils-industry... EUV has been available for years and no doubt TSM…

>Will we have 1-3nm transistors? Yes. Will they be commercially viable? Probably No. Why not? We can only stack our layers so much, eventually the 1-3nm range of transistors will become useful to give technology another squeeze before having to learn how to layer a bizarre number of layers.

28nm is still more expensive today than 40nm ever was, twice as expensive, per wafer, as 40nm currently is. The size of the elements is still somewhat decreasing, but the price per transistor is actually increasing at this point.

Re: IBM’s world-first 5nm chip indicates EUV lithography is ready for primetime

#20

Post by davidf18 »

kurthr wrote: post #16

I wish this wasn't so laughable. What this really shows is that IBM has high margins for their chips, and a long standing tolerance for absurdly low yields and long wafer turn times. That they announce "production" before any of the other fabs is more likely do to PR needs than real technical advancement. https://arstechnica.com/gadgets/2015/07/ibm-unveils-industry... EUV has been available for years and no doubt TSM…

I suspect that one way or the other the military and spy agencies will be funding the further development for national security and weapons reasons. It may not be known, but they are (or will be) funding either directly or indirectly.
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