ChkTag: x86 Memory Safety
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ChkTag: x86 Memory Safety
1–10 of 147 posts
Re: ChkTag: x86 Memory Safety
#2Presumably will be based on the existing Linear Address Masking/Upper Address Ignore specs, which are equivalent, and will be similar to CHERI.
If so it needs to be opt-in or at least opt-out per process, because many language runtimes use these pointers bits to optimize dynamic types, and would suffer a big performance hit if they were unable to use them.
Re: ChkTag: x86 Memory Safety
#3Re: ChkTag: x86 Memory Safety
#4Re: ChkTag: x86 Memory Safety
#5Re: ChkTag: x86 Memory Safety
#6Still cool, but not a replacement for memory safety language implementations.
Re: ChkTag: x86 Memory Safety
#7I wonder what happened that Apple/ARM has implemented something similar at nearly the same time. https://security.apple.com/blog/memory-integrity-enforcement...
Re: ChkTag: x86 Memory Safety
#8Is there a whitepaper or ISA manual change describing the feature?
Re: ChkTag: x86 Memory Safety
#9I wonder what happened that Apple/ARM has implemented something similar at nearly the same time. https://security.apple.com/blog/memory-integrity-enforcement...
Re: ChkTag: x86 Memory Safety
#10Like, cool, you guys are starting to talk about a new instruction set that will make C safe somehow. Yet you failed provide an ounce of detail for how you'll accomplish that.
This might as well been a "And we'll make our CPUs 10x faster and they'll use 10x less power!". Or "Future CPUs will have a 10ghz clock speed!"
Again, who is this article for? The government maybe to assure them that x86 will take cyber security seriously?