Why does this code execute more slowly after strength-reducing multiplications?
1–10 of 155 posts
Re: Why does this code execute more slowly after strength-reducing multiplications?
#2Tldr: autovectorizer transforms the first code into SIMD instructions, but the second into 64 bit instructions.
SIMD is very powerful, and modern compilers can sometimes simd-ify your code automatically.
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The second code can probably become SIMD as well, but it's beyond GCC's ability to autovectorizer it in that form. I kinda want to give it a go myself but don't have time today...
Autovectorizers are mysterious, often harder to see and use than explicitly SIMD code (like OpenCL or CUDA).
Re: Why does this code execute more slowly after strength-reducing multiplications?
#3Tldr: autovectorizer transforms the first code into SIMD instructions, but the second into 64 bit instructions. SIMD is very powerful, and modern compilers can sometimes simd-ify your code automatically. ------- The second code can probably become SIMD as well, but it's beyond GCC's ability to autovectorizer it in that form. I kinda want to give it a go myself but don't have time today... Autovectorizers are mysterio…
How can one go about making one's code apt for a compiler to be able to do these kinds of things?
Re: Why does this code execute more slowly after strength-reducing multiplications?
#4What would be the difference in power consumption from each method? (Would it be always better to multiply? If so why not multiply by one?)
Re: Why does this code execute more slowly after strength-reducing multiplications?
#5Tldr: autovectorizer transforms the first code into SIMD instructions, but the second into 64 bit instructions. SIMD is very powerful, and modern compilers can sometimes simd-ify your code automatically. ------- The second code can probably become SIMD as well, but it's beyond GCC's ability to autovectorizer it in that form. I kinda want to give it a go myself but don't have time today... Autovectorizers are mysterio…
How can one go about making one's code apt for a compiler to be able to do these kinds of things?
I also wonder if there's any compiler that allows you to hint that you expect certain optinizations to occur (like vectorization), and if they do not, fails to compile at all.
Re: Why does this code execute more slowly after strength-reducing multiplications?
#6Tldr: autovectorizer transforms the first code into SIMD instructions, but the second into 64 bit instructions. SIMD is very powerful, and modern compilers can sometimes simd-ify your code automatically. ------- The second code can probably become SIMD as well, but it's beyond GCC's ability to autovectorizer it in that form. I kinda want to give it a go myself but don't have time today... Autovectorizers are mysterio…
How can one go about making one's code apt for a compiler to be able to do these kinds of things?
You study autovectorizers, then you enable autovectorization warning flags, and carefully read your compilers output.
If the compiler says autovectorization failed, you rewrite the code until the autovectorizer works.
https://docs.microsoft.com/en-us/cpp/build/reference/qvec-re...
Re: Why does this code execute more slowly after strength-reducing multiplications?
#7Tldr: autovectorizer transforms the first code into SIMD instructions, but the second into 64 bit instructions. SIMD is very powerful, and modern compilers can sometimes simd-ify your code automatically. ------- The second code can probably become SIMD as well, but it's beyond GCC's ability to autovectorizer it in that form. I kinda want to give it a go myself but don't have time today... Autovectorizers are mysterio…
How can one go about making one's code apt for a compiler to be able to do these kinds of things?
A good way is to have your data arranged in structs of arrays rather than in arrays of structs. This allows the compiler to generate code which just loads in linear sections of memory to SIMD registers. It’s also just more cache efficient in general.
Check out data oriented design if you aren’t already familiar.
Re: Why does this code execute more slowly after strength-reducing multiplications?
#8Tldr: autovectorizer transforms the first code into SIMD instructions, but the second into 64 bit instructions. SIMD is very powerful, and modern compilers can sometimes simd-ify your code automatically. ------- The second code can probably become SIMD as well, but it's beyond GCC's ability to autovectorizer it in that form. I kinda want to give it a go myself but don't have time today... Autovectorizers are mysterio…
The other essential insight is that the second version has data dependencies between loop iterations. Without that, the tldr is incomplete.
Re: Why does this code execute more slowly after strength-reducing multiplications?
#9Tldr: autovectorizer transforms the first code into SIMD instructions, but the second into 64 bit instructions. SIMD is very powerful, and modern compilers can sometimes simd-ify your code automatically. ------- The second code can probably become SIMD as well, but it's beyond GCC's ability to autovectorizer it in that form. I kinda want to give it a go myself but don't have time today... Autovectorizers are mysterio…
How would the second approach be vectorized given each iteration's input has dependence on previous iteration's output??
Re: Why does this code execute more slowly after strength-reducing multiplications?
#10What would be the difference in power consumption from each method? (Would it be always better to multiply? If so why not multiply by one?)
The problem here is that the additions depends on values computed in the previous iteration of the loop. The version with multiplication is faster because there is no dependencies with the previous iteration so the CPU has more freedom scheduling the operations.
The power consumption is a good question.