I got nerd sniped into benchmarking legacy x86 instructions (2019)
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Re: I got nerd sniped into benchmarking legacy x86 instructions (2019)
#2For an instruction only left in for backwards compatibility, I think the microcode is quite nicely optimized. Sure, it could be faster, but it beat two more naive implementations despite originating from the 386 days.
I do wonder, though, if there could still be some hidden gems hidden deep in the legacy instructions that compilers could make use of for some very peculiar algorithms.
Re: I got nerd sniped into benchmarking legacy x86 instructions (2019)
#3> The meme is wrong
The third panel is generally meant to be the correct technical answer, while the last panel is reserved for the punchline.
Understanding the 'galaxy brain' format might have saved the author the trouble (or at least guided proper expectations), although it was a cool exercise.
Re: I got nerd sniped into benchmarking legacy x86 instructions (2019)
#4>The meme is wrong
Nah, it's rather that the meme is correctly absurd, as intended.
Re: I got nerd sniped into benchmarking legacy x86 instructions (2019)
#5For an instruction only left in for backwards compatibility, I think the microcode is quite nicely optimized. Sure, it could be faster, but it beat two more naive implementations despite originating from the 386 days. I do wonder, though, if there could still be some hidden gems hidden deep in the legacy instructions that compilers could make use of for some very peculiar algorithms.
Re: I got nerd sniped into benchmarking legacy x86 instructions (2019)
#6Wouldn't "movzx ecx, al" save one byte of rex.W prefix? Just wondering.
Re: I got nerd sniped into benchmarking legacy x86 instructions (2019)
#7If you do more than microbenchmarking, then the cache effects start showing up and often the smaller-yet-individually-slower sequence begins to win.
But I disagree that the 3 sequences are actually identical in semantics, because the ones containing adds and xors will also affect the flags, while xlat and movs with the arithmetic done in the addressing mode don't.
The other thing to note is that pushes and pops are essentially free despite containing both a memory access and arithmetic --- I believe they added a special "stack engine" to make this fast starting with the P6.
I remember benchmarking AAD/AAM and they were basically exactly the same as the longer equivalent sequences, although that was on a 2nd generation i7. The (relative) timings do change a little between CPUs, but it seems that Intel mostly tries to optimise them every time so they're not all that much slower. It would be interesting to see this benchmark done on some other CPU models (e.g. AMDs, which tend to have very different relative timings, or something like an Atom or even NetBurst.)
Re: I got nerd sniped into benchmarking legacy x86 instructions (2019)
#8> The meme is wrong The third panel is generally meant to be the correct technical answer, while the last panel is reserved for the punchline. Understanding the 'galaxy brain' format might have saved the author the trouble (or at least guided proper expectations), although it was a cool exercise.
I always thought of the last panel as an initially silly-sounding answer that could still be considered correct in some unexpected way. In this case it fits, because if you compile with `-Os`, xlatb is probably the ideal output. I doubt llvm can output xlatb, but I'd be pleasantly surprised if it could
Re: I got nerd sniped into benchmarking legacy x86 instructions (2019)
#9For an instruction only left in for backwards compatibility, I think the microcode is quite nicely optimized. Sure, it could be faster, but it beat two more naive implementations despite originating from the 386 days. I do wonder, though, if there could still be some hidden gems hidden deep in the legacy instructions that compilers could make use of for some very peculiar algorithms.
BCD instructions: https://news.ycombinator.com/item?id=8477254
Re: I got nerd sniped into benchmarking legacy x86 instructions (2019)
#10> The meme is wrong The third panel is generally meant to be the correct technical answer, while the last panel is reserved for the punchline. Understanding the 'galaxy brain' format might have saved the author the trouble (or at least guided proper expectations), although it was a cool exercise.
I'm not really sure this meme has a punchline. The number of instructions decreases in each panel.