Cerebras’ new monster AI chip adds 1.4T transistors
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Cerebras’ new monster AI chip adds 1.4T transistors
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Re: Cerebras’ new monster AI chip adds 1.4T transistors
#2Time for an AI winter I guess.
Re: Cerebras’ new monster AI chip adds 1.4T transistors
#3Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't know off top of my head what the math would be but it is going to plummet drastically. My guess is that they're handling this in the chip logic. Building resiliency by turning off cells in the wafer that didn't yield. That begs the question, how are they probing them? A probe card of the size of the wafer is unheard of. How are they running validation? Pretty mindblowing to say the least!
Re: Cerebras’ new monster AI chip adds 1.4T transistors
#4Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't know off top of my head what the math would be but it is going to plummet drastically. My guess is that they're handling this in the chip logic. Building resiliency by turning off cells in the wafer that didn't yield. That begs the question, how are they probin…
Not an expert in chip manufacturing but my guess is that they just disable the parts that don't work and their big numbers represent ~80% of the actual number of transistors in the wafer because they account for that manufacturing loss.
Re: Cerebras’ new monster AI chip adds 1.4T transistors
#5Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't know off top of my head what the math would be but it is going to plummet drastically. My guess is that they're handling this in the chip logic. Building resiliency by turning off cells in the wafer that didn't yield. That begs the question, how are they probin…
Disabling parts of the chip? The secret sauce then is to make it defect-proof
Re: Cerebras’ new monster AI chip adds 1.4T transistors
#6Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't know off top of my head what the math would be but it is going to plummet drastically. My guess is that they're handling this in the chip logic. Building resiliency by turning off cells in the wafer that didn't yield. That begs the question, how are they probin…
Disabling parts of the chip? The secret sauce then is to make it defect-proof
Yup. This. From https://www.anandtech.com/show/16626/cerebras-unveils-wafer-...:
> Cerebras achieves 100% yield by designing a system in which any manufacturing defect can be bypassed – initially Cerebras had 1.5% extra cores to allow for defects, but we’ve since been told this was way too much as TSMC's process is so mature.
Re: Cerebras’ new monster AI chip adds 1.4T transistors
#7Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't know off top of my head what the math would be but it is going to plummet drastically. My guess is that they're handling this in the chip logic. Building resiliency by turning off cells in the wafer that didn't yield. That begs the question, how are they probin…
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Re: Cerebras’ new monster AI chip adds 1.4T transistors
#8Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't know off top of my head what the math would be but it is going to plummet drastically. My guess is that they're handling this in the chip logic. Building resiliency by turning off cells in the wafer that didn't yield. That begs the question, how are they probin…
Disabling parts of the chip? The secret sauce then is to make it defect-proof
Yep, not all semiconductor defects can be repaired, and at such scale repair circuits themselves will need to be redundant.
Re: Cerebras’ new monster AI chip adds 1.4T transistors
#9Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't know off top of my head what the math would be but it is going to plummet drastically. My guess is that they're handling this in the chip logic. Building resiliency by turning off cells in the wafer that didn't yield. That begs the question, how are they probin…
They probably aren't bothering to. The extreme economics for producing this type of chip are likely acceptable to the stakeholders.
Also, there is no reason they cant have some redundancy throughout the design so you can fuse off bad parts. It all really depends on the nature of the anticipated vs actual defects, which is an extraordinarily deep rabbit hole to climb into.
Re: Cerebras’ new monster AI chip adds 1.4T transistors
#10Most interesting aspect of wafer-scale manufacturing is yield. Even if we have 95% chip yield, as the chip size approaches the wafer-level dimensions, I don't know off top of my head what the math would be but it is going to plummet drastically. My guess is that they're handling this in the chip logic. Building resiliency by turning off cells in the wafer that didn't yield. That begs the question, how are they probin…
I bet they just probe the chip:
1. piece by piece
2. on die test circuits