31–40 of 47 posts
Earlier quoted context omitted.
It doesn't even compile, the whole thing is evidently built on vibes.
It doesn't compile for you or doesn't compile at all? Honest question. It's a nice project in the face of it but if it's all AI fever dreams that would be disappointing. I don't have the cycles to try it out right now.
The README mentions ARMv7-M, RISC-V, and AVR, but no actual SoCs or boards, and the source code contains unconditional inline assembly for Arm. Similarly, there are measurements of context switch time on RISC-V, while the scheduler is one big stub that doesn't even enter a task, only returns from itself using Arm-specific assembly [0]. The examples rely on this scheduler never returning, so there's no way any of them…
Don't forget the 71 stars on github, and counting!
I have no practical insight on RTOS in general, if anyone bothers to give me a hint, please. From all what I've looked into, RTOS does mean to create software systems that are almost perfectly predictable and safe to execute. Predictable latency, runtime and memory usage, plus maybe side channels to do the unpredictable stuff in between. It's actual rocket science, as no systemic mistakes are allowed. The confusion i…
You might execute formally verified code within an RTOS, which is your two worlds? Consider you have some critical control loop, like an autopilot (see Ardupilot). That control loop must run at some minimum rate, and the action of the system must be well characterized. Similarly you might want to guarantee that you sample a bunch of sensors frequently enough (so the most recent reading is no older than some time period).
The README mentions ARMv7-M, RISC-V, and AVR, but no actual SoCs or boards, and the source code contains unconditional inline assembly for Arm. Similarly, there are measurements of context switch time on RISC-V, while the scheduler is one big stub that doesn't even enter a task, only returns from itself using Arm-specific assembly [0]. The examples rely on this scheduler never returning, so there's no way any of them…
I reflexively reload HN many times per day, but I'm wondering if I need a walled garden with some sort of curation of individuals - which sucks - to get the signal level I want.
The README mentions ARMv7-M, RISC-V, and AVR, but no actual SoCs or boards, and the source code contains unconditional inline assembly for Arm. Similarly, there are measurements of context switch time on RISC-V, while the scheduler is one big stub that doesn't even enter a task, only returns from itself using Arm-specific assembly [0]. The examples rely on this scheduler never returning, so there's no way any of them…
HN used to provide a really high signal to noise ratio for me, but it's degrading pretty quickly. There are new accounts below saying "hey I just learned what RTOS means, thanks!" I reflexively reload HN many times per day, but I'm wondering if I need a walled garden with some sort of curation of individuals - which sucks - to get the signal level I want.
Earlier quoted context omitted.
Looks like a fun project, but I’m curious what you actually tested on. There’s real numbers for estimated context switch timing, and you mentioned implementing context switching, but I can’t find any actual implementations of the context switching routine in your code. You don’t need to do this yourself, but it’s weird to talk about it if you haven’t.
https://github.com/cmc-labo/tinyos-rtos/blob/2a47496047fdb45... "Context switch (to be implemented in assembly for target architecture)" There's no asm in the repo so I can only assume this is not something that actually compiles and runs. Other things that are missing: - No startup code (stack setup etc.) - No linker script ("to be created", per makefile comment)
The README mentions ARMv7-M, RISC-V, and AVR, but no actual SoCs or boards, and the source code contains unconditional inline assembly for Arm. Similarly, there are measurements of context switch time on RISC-V, while the scheduler is one big stub that doesn't even enter a task, only returns from itself using Arm-specific assembly [0]. The examples rely on this scheduler never returning, so there's no way any of them…
And then a bunch of green new accounts commenting on how it's cool and they learned something. It's just a never ending attack on our attention.
Earlier quoted context omitted.
It doesn't compile for you or doesn't compile at all? Honest question. It's a nice project in the face of it but if it's all AI fever dreams that would be disappointing. I don't have the cycles to try it out right now.
It won't compile for anyone, it's not a real software project.