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Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

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Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

#1

Post by LangIsAllWeNeed »

Something I often hear is that the modern CPU has bunch of sort of “poly fills” to merge the programming paradigms of past with new tech. Microcode perhaps mostly. Like that C programming, which mostly forms basis for other absractions no longer captures how a cpu works, and the cpu tries to optimize C type abstractions for modern post 80/90s innovations.

What would a new paradigm for CPU and GPUs look like? Is there some aspect of the legacy system that is not ideal but clearly economically impossible to change. Does the poly fill type design of cpu microcode have drawbacks?

One analogy is planes. Plane design has remained pretty unchanged since 1960s because of regulations, very different design = pay to retrain pilots. Of course planes have still drastically improved across board, but but they are still controrting themselves to adhere to the paradigm of the pilots for economic reasons. Without this, a new plane design might be quite different. (This is part of the Boeing crisis- the software was designed to “polyfill” the change in flight beahvior caused by the contorting themselves to get a better engine on similiar plane frame)

Re: Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

#3

Post by eimrine »

I refuse to understand your C programming point, but answering your question, a computer might be a Lisp machine and/or having von-Neumann architecture instead of Harvard one. CPU might be more multithread and GPU might be better suited for such things as calling eval().

Re: Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

#4

Post by Leftium »

1. [Ternary computers]: Base-3 is the most efficient of all integer bases; numbers are stored most economically with trits.

2. Something like a [Lisp machine] that is optimized for functional-style programming with immutable data.

[Ternary computers]: https://www.wikiwand.com/en/Ternary_computer

[Lisp machine]: https://www.wikiwand.com/en/Lisp_machine

Re: Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

#5

Post by t-3 »

eimrine wrote: post #3

I refuse to understand your C programming point, but answering your question, a computer might be a Lisp machine and/or having von-Neumann architecture instead of Harvard one. CPU might be more multithread and GPU might be better suited for such things as calling eval().

> having von-Neumann architecture instead of Harvard one.

I think you got that backwards. Von Neumann is mainstream and a few MCUs use Harvard architecture.

Re: Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

#6

Post by Am4TIfIsER0ppos »

Without being too radical you might merge some things. Hardware detection like on x86. Feature identification like on x86 (cpuid). Fixed size instructions seem to be "more popular". Variable length vector operations/loops seem intriguing (decent presentation about it at fosdem this year).

What's probably going to happen is more integration and more drm.

Re: Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

#7

Post by eimrine »

t-3 wrote: post #5
eimrine wrote: post #3

I refuse to understand your C programming point, but answering your question, a computer might be a Lisp machine and/or having von-Neumann architecture instead of Harvard one. CPU might be more multithread and GPU might be better suited for such things as calling eval().

> having von-Neumann architecture instead of Harvard one. I think you got that backwards. Von Neumann is mainstream and a few MCUs use Harvard architecture.

So why a CPU cache (L1 L2 L3) has 2 halves, one for code and another for data?

Re: Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

#8

Post by t-3 »

eimrine wrote: post #7
t-3 wrote: post #5

Earlier quoted context omitted.

> having von-Neumann architecture instead of Harvard one. I think you got that backwards. Von Neumann is mainstream and a few MCUs use Harvard architecture.

So why a CPU cache (L1 L2 L3) has 2 halves, one for code and another for data?

Can you directly choose what goes into the cache or is it just a technical optimization? Which instructions read and write the cache?

Re: Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

#9

Post by zerohp »

t-3 wrote: post #8
eimrine wrote: post #7

Earlier quoted context omitted.

So why a CPU cache (L1 L2 L3) has 2 halves, one for code and another for data?

Can you directly choose what goes into the cache or is it just a technical optimization? Which instructions read and write the cache?

You can directly choose what is available on the instruction side by using the XN (aka XD) permission bits in the page table. Other mechanisms exist to make pages readable by instruction fetch but not readable by the data side.

Von Neumann vs Harvard is a pointless discussion. Both are too simplistic describe modern architectures.

Re: Ask HN: If the CPU redesigned today, with no legacy incentives what can change?

#10

Post by LangIsAllWeNeed »

eimrine wrote: post #3

I refuse to understand your C programming point, but answering your question, a computer might be a Lisp machine and/or having von-Neumann architecture instead of Harvard one. CPU might be more multithread and GPU might be better suited for such things as calling eval().

How would you understand the c to architecture connection?

I have read that C ideas are baked into how higher level programming languages work, but modern cpus are a lot more parallel and some other things than most languages fail to account for, so the microcode tries to bridge gap.

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