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Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

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Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#71

Post by gluggymug »

phkahler wrote: post #62
pslam wrote: post #48

Earlier quoted context omitted.

As a veteran from the chip industry, I can tell you my experience is completely the opposite. Nobody in their right mind would produce an ASIC without going through simulation as a form of validation. For anything non-trivial, that means FPGA.

I find the above pair of comments really interesting. I'm guessing there are parallels with differences of opinion and approach in other areas of engineering. There are always reasons for the differences, and those are usually rooted in more than just opinion or dogma. In this case, I'd guess its got a lot to do with cost vs relevance of the simulation. If you're Intel or AMD making a processor, I bet FPGA versions o…

"If you're Intel or AMD making a processor, I bet FPGA versions of things are not terribly relevant because it doesn't capture a whole host of physical effects at the bleeding edge."

Exactly. When you verify a design via an FPGA you are only essentially testing the RTL level for correctness. Once you synthesise for FPGA rather than the ASIC process, you diverge. In ASIC synthesis I have a lot more ability to meet timing constraints.

So given that FPGA validation only proves the RTL is working, ASIC projects don't focus on FPGA. We know we have to get back annotated gate level simulation test suite passing. This is a major milestone for any SoC project. So planning backwards from that point, we focus on building simulation testbenches that can work on both gate level and RTL.

I am not saying FPGAs are useless but they are not a major part of SoC work for a reason. Gate level simulation is a crucial part of the SoC design flow. All back end work is.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#72

Post by tmccrmck »

orbifold wrote: post #61

Regarding the ASIC part: There are several good courses online that explain the whole process from hardware description in a hardware description language to GDSII file, which you could send to a foundry in some detail. See for example this course https://web.csl.cornell.edu/courses/ece5745/ , there are also very good courses available from Berkeley and MIT. What is usually missing is the more gory details of the bac…

I wouldn't start with Chisel as there's a lack of good documentation online. When I used it for a Berkeley class, sometimes you would feel like you hit a wall. Verilog or SystemVerilog will have much more in the way of stack overflow type of documentation.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#73

Post by peterburkimsher »

I studied an MEng in Electronic Systems Engineering, and really enjoyed the courses in IC design.

However, I couldn't find a chip-design job in a country other than the US or UK that wasn't related to military applications.

Now I work in Taiwan, and I see the chips being made! But my work is related to control systems for the testing equipment, which is software instead of hardware design.

I got a Virtex-II FPGA board from a recycling bin, and I wanted to find a good personal project for it. Even now, I'm at a loss for ideas. I can do everything I need with a Raspberry Pi already.

Please can someone suggest some good projects I could only do with an FPGA?

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#74

Post by rasz »

You can start at the beginning of VLSI revolution and read from the horses mouth 'Introduction to VLSI Systems'. If you are still serious about it get into MITs EECS.

Btw you ask about 4 almost totally separate areas(RTL UVM TB etc), only managers/execs/veterans/architects know the whole process from raw silicon to packaging.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#75

Post by gibrown »

gluggymug wrote: post #69
pslam wrote: post #48

Earlier quoted context omitted.

As a veteran from the chip industry, I can tell you my experience is completely the opposite. Nobody in their right mind would produce an ASIC without going through simulation as a form of validation. For anything non-trivial, that means FPGA.

I don't agree. If it's non trivial, I don't have the more advanced verification tools such as UVM if I prototype via FPGA. The ability to perform constrained randomised verification is only workable via UVM or something like it. For large designs that is arguably the best verification methodology. Without visibility through the design to observe and record the possible corner cases of transactions, you can't be assur…

This was my experience working on SoCs at Broadcom also where we didn't really use FPGAs at all.

But at another employer that did not work on consumer designs, I did use a lot of large FPGAs in final shipped products, and in those cases we did some of our heavy testing and iterating on the real FPGA(s). For example I built a version of the FPGA with pseudo-random data generation to test an interface with another FPGA. When I found a case that failed I could then reproduce it in simulation much more quickly.

That employer also built some ASIC designs and I remember some discussions about using FPGA prototyping for the ASICs to speed up verification or get a first prototype board built faster that would later get redesigned with the final ASIC. I don't know if they ever went down that route but it would not surprise me if they did. These were $20k PCB boards once fully assembled, and integration of the overall system was often a bigger stumbling block than any single digital design.

There are a lot of different hardware design niches so I'm sure there are many other cases.

All my information is also about 10 years out of date.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#76

Post by Figs »

You may find the book Contemporary Logic Design by Katz and Borriello to be interesting. Its what we used in my college digital logic class.

For my computer architecture class (i.e. the class where we learn how to design basic CPUs -- and ultimately implemented one in Verilog), we used Computer Organization and Design by Patterson and Hennessy. That might also be of interest.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#77

Post by DigitalJack »

exikyut wrote: post #53
jleahy wrote: post #43

Earlier quoted context omitted.

This is a very difficult project. No FPGAs have anything to decode TMDS. What they have is transceivers that will take the multi-gigabit serial signal and give it to you 32-bits or 64-bits at a time. Then it's your job to handle things like bit alignment, 8b10b decoding, etc. You need 6MB of RAM to hold one frame at 1080p, and to do this you'll need to hold one for each input. That requires external RAM (there's no e…

I see... ouch. Another comment mentioned the HDMI2USB project, and the main FPGA target of that project uses DDR3 FWIW. I get the impression that managing RAM is just really really really _unbelievably_ hard; not impossible, just pɹɐɥ ʎllɐǝɹ ʎllɐǝɹ.

I don't think it's that bad. Board design is, but if you are working with some standard board, say from Opal Kelly (no affiliation), then you don't have to worry about that.

But what about the DRM with HDMI? I have no idea how it works, but I assumed the signal was encrypted.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#78

Post by theyregreat »

Figs wrote: post #76

You may find the book Contemporary Logic Design by Katz and Borriello to be interesting. Its what we used in my college digital logic class. For my computer architecture class (i.e. the class where we learn how to design basic CPUs -- and ultimately implemented one in Verilog), we used Computer Organization and Design by Patterson and Hennessy. That might also be of interest.

Yup. We used both of those too. Learning Karnaugh maps and De Morgan’s laws are also helpful for simpler combinational logic simplification. Sequential logic and state machines are the next step. From there, simple Harvard architecture CPUs can be constructed.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#79

Post by mikeash »

DigitalJack wrote: post #77
exikyut wrote: post #53

Earlier quoted context omitted.

I see... ouch. Another comment mentioned the HDMI2USB project, and the main FPGA target of that project uses DDR3 FWIW. I get the impression that managing RAM is just really really really _unbelievably_ hard; not impossible, just pɹɐɥ ʎllɐǝɹ ʎllɐǝɹ.

I don't think it's that bad. Board design is, but if you are working with some standard board, say from Opal Kelly (no affiliation), then you don't have to worry about that. But what about the DRM with HDMI? I have no idea how it works, but I assumed the signal was encrypted.

HDCP (the DRM tech for HDMI) was not very well designed, and the master keys were cracked some years ago.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#80

Post by j_s »

mschuster91 wrote: post #59
pjc50 wrote: post #38

Earlier quoted context omitted.

The capture thing appears to exist: https://www.blackmagicdesign.com/products/hyperdeckshuttle/ - presumably it applies lossless compression. Lossless encoding within the h264 container should be possible.

That Blackmagic stuff is really awesome. Expensive as ..., but worth every penny.

Pardon my ignorance, but I thought Blackmagic's claim to fame was always being on the low end of the pricing for their tech.
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