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Ask HN: How did Apple manage to create such a better chip than Intel?

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Re: Ask HN: How did Apple manage to create such a better chip than Intel?

#61
post #11

https://news.ycombinator.com/item?id=25257932 My 10,000' view understanding: - Small feature size. M1 is a 5nm process. Intel is struggling to catch up to TSMC's 7nm process - more efficient transistors. 7nm uses finFet. M1 probably uses GAAFET, which means you can cram more active gate volume in less chip footprint. This means less heat and more speed - layout. M1 is optimized for Apple's use case. General purpose c…

The fancy stuff with the reorder buffer, decoder, and branch prediction is the most important thing. The M1 is just as general purpose as any Intel/AMD CPU, and indeed even more so because it's designed to scale from cell phones to desktops.

Specialization helps when it helps, but doesn't do much on typical programs and M1 still excels on those.

Re: Ask HN: How did Apple manage to create such a better chip than Intel?

#62

Earlier quoted context omitted.

They fully support i386 via Rosetta 2 though. The real explanation is Intel has been complacent and lazy. We had 5 generations of the same chip. Enough is enough.

What about AMD though? They are at par with M1 but use a lot more power while doing so. I don't think it's an Intel problem, it's an x86 problem

It's not an x86 problem. Apple has been lapping all of its ARM competitors for a while now too.

Re: Ask HN: How did Apple manage to create such a better chip than Intel?

#63
post #18

Lots of other comments point out the vertical integration. For raw single-thread performance: 1. ARM64 is a fixed-width instruction set, so their frontend can decode more instructions in parallel. 2. They got one honking monster of an out-of-order execution engine. (630 entries), which feed: 3. 16 execution ports.

I don't fully grasp assembly, instruction sets, and how CPUs work so pardon the silly questions. I think I understand 1) as since they know the width they can more accurately divide the instructions to more parallel executers (whatever they are - the execution ports?) 2) I believe this allows more "pre-work" to get done before it's actually needed, but then the "pre-work" just chills until 3) these things do the work…

I think it's easy to underestimate how much difference (1) makes. Take the famous line "thequickbrownfoxjumpsoverthelazydog" - and think how you'd parse that out programatically. You'd start at the start, reading each character in, comparing it against a dictionary, and when you decide you have a whole word - then you can split that word out - and then continue on to the next.

But you can't really do this in parallel as the start for each word depends on the previous split already being known.

If it was simply law that every word in existence was 5 characters, you could parse this out with zero lookups, zero knowledge. "accurately" isn't so much the issue, it's that you have to decode each instruction to know where the next starts.

Re: Ask HN: How did Apple manage to create such a better chip than Intel?

#64
post #24

I just wanted to point out that it is not Apple out of the blue made a chip better than Intel's. They have also been designing chips for quite a while. The APL0098 chip that was used in the original iPhone was introduced back in 2007.

Which also implies that intel had a lot of time to catch up.

I read somewhere (possibly on this site) that intel made a purposeful decision to not invest in trying to catch up as they didn't believe in the feasibility of 5nm and lower due to difficulties managing thermal issues. Not sure how true that is but it would explain a lot.

Re: Ask HN: How did Apple manage to create such a better chip than Intel?

#66

It's not just the M1's design, it's what they don't have to do: no need to support anything legacy. You can't change the x86 ISA to the point where it makes a huge difference because it would no longer run x86 code. Intel can probably make faster stuff than they currently do but then their customers (PC manufacturers for instance) would have to modify all their stuff as well and they don't want to, or at least, won't…

I respectfully disagree. Why can't Intel/AMD make new flavor of chips & motherboards explicitly saying - it doesn't support x86 ISA. Then, wouldn't we address that problem?

Intel tried that with Itanium.

Didn’t work out so well

Re: Ask HN: How did Apple manage to create such a better chip than Intel?

#67

Earlier quoted context omitted.

The code complexity to pipeline everything to be DSP-like to avoid memory latencies is very different. And you can be sure that most developers (particularly non-console developers) aren't thinking about it. Was super impressed with how Naughty Dog was able to use 70% of the SPUs on Uncharted 2 though - which was either at launch or close to launch.

The answer for that one is real simple, it was mostly a function of what your first target platform was. Back in that era X360 had the edge by coming out slightly ahead schedule wise so most engines targeted that first and then had a brutal slog to cram things down to the SPUs on the subsequent PS3 port. If you went the other way though your nicely linearized SPU friendly data code fit in-cache on the X360/PC and usu…

Once again, it was just more work to pipeline your data. That the same code worked well across both isn't my point. I worked on an engine team supporting both of those platforms, so I know. This kind of approach is pretty rare for desktop and mobile apps, which is what the M1 is used for.

Edit: Exceptions being typical DSP realms, such as video/image/sound processing, rendering packages, AI, which are all already targeting GPUs. Note that Final Cut Pro works faster on Intel setups with traditional (non-integrated) GPUs vs M1.

Re: Ask HN: How did Apple manage to create such a better chip than Intel?

#68
post #60
post #53

I think the M1 chip finally proves the inherent design superiority of RISC over CISC. For years, Intel stayed ahead of all other competitors by having the best process, clockspeeds, and the most advanced out-of-order execution. By internally decoding CISC to RISC, Intel could feed a large number of execution ports to extract maximum ILP. They had to spend gobs of silicon for that: complex decoding, made worse by the…

ARM64 can't be that easy to decode, since ARM's recent high-performance cores (A78, X1) decode ARM64 instructions into MOPS and feature a MOP cache: https://www.anandtech.com/show/15813/arm-cortex-a78-cortex-x... . And we don't know that the M1 doesn't do that. Also, even on Zen 2, the entire decode section is still a fraction of the size of say the vector units: https://forums.anandtech.com/threads/annotated-hi-res-…

> ARM64 can't be that easy to decode, since ARM's recent high-performance cores (A78, X1) decode ARM64 instructions into MOPS and feature a MOP cache

My point was more about that the fixed-width instructions allow trivial parallel decoding while x86 requires predicting the length of instructions or just brute forcing all possible offsets, which is costly.

> The real question is how does Apple keep that thing fed?

That's why there's such an enormous reorder buffer. It's so that there's a massive amount of potential work out there for execution ports to pick up and do. Of course, that's all wasted when you have a branch mispredict. I haven't seen anything specific about M1's branch prediction, but it is clearly top-notch.

Re: Ask HN: How did Apple manage to create such a better chip than Intel?

#69

Earlier quoted context omitted.

The answer for that one is real simple, it was mostly a function of what your first target platform was. Back in that era X360 had the edge by coming out slightly ahead schedule wise so most engines targeted that first and then had a brutal slog to cram things down to the SPUs on the subsequent PS3 port. If you went the other way though your nicely linearized SPU friendly data code fit in-cache on the X360/PC and usu…

Once again, it was just more work to pipeline your data. That the same code worked well across both isn't my point. I worked on an engine team supporting both of those platforms, so I know. This kind of approach is pretty rare for desktop and mobile apps, which is what the M1 is used for. Edit: Exceptions being typical DSP realms, such as video/image/sound processing, rendering packages, AI, which are all already tar…

Oh I worked on titles in that era too, and on other oddball platforms like the PSP :).

Without getting into the weeds too much you just weren't doing much with the single CPU core on the PS3. As soon as you booted anything of note it was pretty obvious that you'd have to offload to the SPUs. I'm not saying that it wasn't more work, but most of the other teams we talked with who had done PS3 as a baseline first had a much, much easier time of it.

I would say that any console/handheld developer the approach wasn't unfamiliar, but there were certainly a fair number of engines with roots in the PC space that had a rough time of it. That said it was more down to the SPUs than anything related a unified memory architecture(although we did do some fun shenanigans around streaming music back from VRAM to the CPU to give us more system memory headroom).

Re: Ask HN: How did Apple manage to create such a better chip than Intel?

#70
post #39

Earlier quoted context omitted.

The M1 does one thing: run MacOS and MacOS apps. They can control the vast majority of the compiled code that will be run on the chip - unlike an x86 platform where the exact same architecture is used for desktops, servers and everything in between - including Linux, windows, and Mac. Specifically there is a reference counting optimization on the M1 that dramatically helps performance of compiled Swift apps - somethi…

Could there also be hardware acceleration or built-in support for Objective-C's message-passing? I've always wondered how Apple gets decent performance with Objective-C in-spite of MP given it its complexity compared to vtables (and vtables have the advantage of being easily cachable in L1/L2).

I haven't read it, but this article might address your performance question: https://www.mikeash.com/pyblog/friday-qa-2017-06-30-dissecti...
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