Currently works only on branch-free AVX2 sequences where each SIMD lane is doing the same thing, and can calculate arbitrary graphs of 4 instructions for 8/16/32/64-bit SIMD.
I plan to add both more aggressive models of what can be represented (e.g. normal x86 or ARM programming as well as general SIMD), as well as working on synthesizing iterative and recursive sequences. It's already semi-useful in a niche.