I'm trying to learn FPGA by making a really tiny CPU:
https://github.com/jes/jescpu> An 8-bit CPU, and 8-bit address space. This means there are only 256 bytes of memory available.
> There are no register operands, no immediate mode operands, and no indirect addressing. All operands are direct addresses. In particular this means that to use pointers you need self-modifying code (i.e. rewrite the address of the instruction to match the address that your pointer points to).
It works right now, but only if I run the CPU at 1/8th of the clock speed of the memory (see slowclock.v). I understand that it takes an extra cycle for reads from memory to get the signals back to the CPU, but don't yet understand why it takes 8 cycles.
Eventually I would like to expand it to support 16 bit addresses, put it in a fancy box with some actual IO devices, and possibly even implement it with logic gates instead of an FPGA.