I'm plugging away on my BitGrid project.... a Turing complete stripped down version of an FPGA without routing fabric and
with added delays (for reasons). I'm learning KiCad 8.0, so I can do schematics and build a prototype cell out of TTL.[1]
I'm also re-acquainting myself with Verilog so I can do an ASIC prototype through TinyTapeout. The main question that I hope to answer is just how much power a bitgrid cell actually consumes, both static and dynamic. If it's low enough, then it'll give Petaflops to the masses, if not.. it's a curiosity.
Along that path, I've learned that the configuration memory for the LUTs is going to consume most of the silicon. Since it's all just D flip-flops... I figured I could dual-use it as memory without loss of generalization. You can virtually add 2 bytes of memory in a cell in any of the 4 directions... so I call it IsoLinear Memory.[2] ;-)
I should be able to make the deadline for TinyTapeout 9, in November. Meanwhile I'll update my emulator to include Isolinear Memory, and figure out how to program the damned thing. My stretch goal is to figure out how to program it from TinyGrad.[3].
If nothing else, it'll be good for real time DSP.
[1] https://github.com/mikewarot/BitGrid_TTL
[2] https://github.com/mikewarot/BitGrid_TTL/tree/master/IsoLine...
[3] https://github.com/tinygrad/tinygrad