Ask HN: Does anyone care about OpenPOWER? • Hacker News Board

Re: Ask HN: Does anyone care about OpenPOWER?

#111

Post by ksec » Sat, Feb 10, 2024, 12:50 PM UTC

ithkuil wrote: post #53

SpecialistK wrote: post #20

I suspect IBM opened up the ISA (and some hardware designs) because they were quickly losing market relevance. Apple and gaming have moved on, new projects will use Arm or RISC-V, so the only markets I can think of are: * automotive and other legacy embedded applications * data centers with existing POWER applications * niche workstations like the Talos I do enjoy alternative ISAs, so I'd love to be wrong on this.

Iirc OpenPOWER predates RISC-V by two years

I think OpenPOWER had some initial patent grant or license issues that wasn't ready until a few years after, after RISC-V came out. By then it was a little too late.

May be blame it on IBM again. Personally I quite like OpenPOWER.

Re: Ask HN: Does anyone care about OpenPOWER?

#112

Post by avianes » Wed, Feb 14, 2024, 7:47 AM UTC

api wrote: post #50

bluedino wrote: post #48

Earlier quoted context omitted.

Today we deploy to the cloud and work on Arm/x86 Do most web developers do things that have issues being cross platform?

Even modern C and C++ code generally ports just fine as long as you avoid things with unspecified behavior like exotic casts and weird pointer tricks. Have to watch endianness too but that doesn’t actually come up all that often. Also AFAIK there are no longer any big-endian architectures in common use. Newer languages are even easier. Rust and Go almost always port with zero issues. Obviously the same goes for scrip…

Are you aware that x86 and ARM/POWER/RISCV memory consistency model are really different? You can encounter very sneaky multitreading bug when running on ARM/POWER/RISCV a program that you have only tested on x86.

Apple has actually put a lot of effort to make the x86 to ARM transition as smooth as possible regarding memory consistency model, this is a strong indication that it's not as trivial as you seem to think.

Re: Ask HN: Does anyone care about OpenPOWER?

#113

Post by brucehoult » Fri, Feb 16, 2024, 3:13 AM UTC

avianes wrote: post #112

api wrote: post #50

Earlier quoted context omitted.

Even modern C and C++ code generally ports just fine as long as you avoid things with unspecified behavior like exotic casts and weird pointer tricks. Have to watch endianness too but that doesn’t actually come up all that often. Also AFAIK there are no longer any big-endian architectures in common use. Newer languages are even easier. Rust and Go almost always port with zero issues. Obviously the same goes for scrip…

Are you aware that x86 and ARM/POWER/RISCV memory consistency model are really different? You can encounter very sneaky multitreading bug when running on ARM/POWER/RISCV a program that you have only tested on x86. Apple has actually put a lot of effort to make the x86 to ARM transition as smooth as possible regarding memory consistency model, this is a strong indication that it's not as trivial as you seem to think.

You have to be doing pretty strange things with threads, without using mutexes or atomic instructions, to have a problem with this.

RISC-V has a standardised (optional) TSO memory model mode, plus "fence.tso" instruction that works in normal mode, even on CPUs that predate it (it defaults to the stronger "fence rw,rw" in that case). Well, assuming the CPU core designer read the spec carefully and doesn't trap on unknown "fence" instructions (looking at you, THead...)