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Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

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Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#101
post #58
post #50

Earlier quoted context omitted.

If you do that, why wouldn't you use a FPGA or just a fast CPU? Microcontrollers and CPUs are blending in performance, and are cheap enough to plop on a board and call it done for many applications.

Sure, but if really want to avoid trusting trust (and you're of the mind to build your own hardware), FPGAs and µcs offer a lot of room for snooping. Given the GPs suggested use, it seemed trusting trust was not on the table. Certainly even a tiny FPGA can fit pretty naïve versions of common crypto primitives, as can any modern micro-controller. Assuming you only need to do a handful of ops for whatever you're lookin…

I was thinking about a chip with only sram for secret storage that could be bundled into a ID-1 sized card with some small energy storage for the sram (there are affordable .5mm LiPo Cells that fit inside such a card), and then use the card to fit some display capable of giving some little data out, as well as a touch matrix,possibly by just using a style similar to carbon-contacts on cheap rubber membrane keyboards, but gold plated like the smartcard interface. But it seems like you can't afford to store one decompressed ed25519 or dare rsa, so the idea is moot by virtue of requiring sub-100nm technology to fit at least some sram.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#102
post #21
post #17

Earlier quoted context omitted.

If i correctly understand what you are saying, it cold pe possible to make a custom small chip for doing some crypto capable of a little more than what those smartcards offer for under 10k$? That would be awesome, from a trust perspective, at least if you could realistically compare the chip you get back with what you know to expect, using an electron microscope.

Not for an ASIC without spending a LOT on tooling, and really $10k is awfully optimistic even if you had all of that tooling (I probably should've just said tens of thousands). For Honestly, you might be better off just buying functional ICs (multi-gate chips, flip flops, shift registers, muxes, etc.) and making a PCB, though. Most crypto stuff is small enough that you can do a slow/iterative solution in fairly small…

In the usecase a lack of accessibility of sram content through probing is very important. The benefit of this over some μC or fpga is that you can account for every spec on a scanning tunnel electron microscope. And the high resolution xray you made before while the chip was still in it's package. Which you can compare with all the chips you will use and ship. It is sadly easy to backdoor with just a single hidden gate.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#103
post #4

I wouldn't get too hung up on the phrase 'IP core', it's basically the equivalent of a software library. A reusable chunk of silicon or verilog. If you want to know about how chips are made then I'd highly recommend the book "CMOS Circuit Design and Simulation" by Baker. It's starts off telling you how silicon is etched to make chips, then goes through how MOSFETs work and how to simulate them using SPICE. By the tim…

But, if you want to make a high performance netlist, I'd argue you want to know all about logic gates, Boolean math, and all the rest. HDL stands for "hardware description language", and you'll only write good HDL if you know what you're writing looks like in gates. (Though if you're just making an LED blink when you push a button, you don't need to write good HDL)

Seconded. The way FPGAs work internally is not really how gate-based (dedicated) chips work internally. FPGAs simulate gates with static RAM tables.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#104

As a veteran from the chip industry, I should warn you that all these suggestions about FPGAs for prototyping are not really done that much in the ASIC industry. The skills to do front end work are similar but an ASIC design flow generally doesn't use an FPGA to prototype. They are considered slow to work with and not cost effective. IP cores in ASICs come in a range of formats. "Soft IP" means the IP is not physical…

I've had a different experience to this. I've worked on ASIC's for over ten years and have had experience with nearly all aspects of the design flow (from RTL all the way to GDS2 at one point or another). I've taped out probably 20+ chips (although I've been concentrating on FPGA's for the last three years). Every chip that I've taped out has had extensive FPGA prototyping done on the design. This is in a variety of different areas too (Bluetooth, GPU's, CPU's, video pipelines, etc). You can just get a hell of a lot more cycles through an FPGA prototyping system than you can an RTL sim and when you are spending a lot of money on the ASIC masks, etc you want to have a chance to soak test it first.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#105
post #46
post #4

I wouldn't get too hung up on the phrase 'IP core', it's basically the equivalent of a software library. A reusable chunk of silicon or verilog. If you want to know about how chips are made then I'd highly recommend the book "CMOS Circuit Design and Simulation" by Baker. It's starts off telling you how silicon is etched to make chips, then goes through how MOSFETs work and how to simulate them using SPICE. By the tim…

> If you want to know about how chips are made then I'd highly recommend the book "CMOS Circuit Design and Simulation" by Baker. This is a ~$120 book. Do you (or anyone else) have a recommendation for something a little easier to tell hobbyists they should get?

Look for Indian editions (their students obviously can't afford American-priced books), these usually have a marker on the cover saying it's not to be distributed outside Indian subcontinent, but it stops no one.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#106
post #48

Earlier quoted context omitted.

As a veteran from the chip industry, I can tell you my experience is completely the opposite. Nobody in their right mind would produce an ASIC without going through simulation as a form of validation. For anything non-trivial, that means FPGA.

I find the above pair of comments really interesting. I'm guessing there are parallels with differences of opinion and approach in other areas of engineering. There are always reasons for the differences, and those are usually rooted in more than just opinion or dogma. In this case, I'd guess its got a lot to do with cost vs relevance of the simulation. If you're Intel or AMD making a processor, I bet FPGA versions o…

Let me try to summarize part of this: When you're building an ASIC, you have to care about the design at the transistor level because you're going for maximum density, maximum speed, high volume, and economies of scale. When you're building an FPGA, you are only allowed to care about the gates, which is one abstraction level higher than transistors.

In an FPGA, you cannot control individual transistors. (FPGAs build "gates" from transistors in a fundamentally different way than ASICs do, because the gates have to be reprogrammable.) And that's okay because FPGA designs aren't about the highest possible speed, highest density, highest volumes or lowest volume cost.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#107
post #8

Nand 2 Tetris[1] is a good starting place. You should get a good view of how the different level interact. Coursera have two cources [2][3] that cover the same material as the book [1] http://nand2tetris.org/ [2] https://www.coursera.org/learn/build-a-computer [3] https://www.coursera.org/learn/nand2tetris2

I second this course. It's awesome. The next step from there is probably Coursera's VLSI course, starting with https://www.coursera.org/learn/vlsi-cad-logic . It's all about how real-world VLSI CADs work.

Thanks! I finished Nand2Tetris and was wondering where to look for a good next step.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#108
post #68

Earlier quoted context omitted.

I think your compilers example doesn't fit. They are actually a rather straightforward thing to build, many undergraduates build one as part of their studies, some hobbyists build compilers that get used by thousands of people and in fortune 500 companies core infrastructure. There's little rigor involved. Among the few software systems that need rigor are control systems for physical installations and trading/financ…

Also many production-grade compilers (GCC/G++, Clang, OpenJDK, V8, and almost every new language that's come out since the 90s) are open-source. You can go read the commit logs & source code to see how they work, if you're diligent and willing to slog through them. There are certainly tricks that professional compiler writers use that aren't covered in textbooks (the big ones center around error-reporting, incrementa…

im generally talking intel c++ compilers, etc. When I was doing EDA, we used to fork out a lot of cash for these compilers and these guys used to work very closely with us to optimize for certain kinds of code styles - for example loop unrolling on HP-UX, etc. I dont know if this is still a thing, so i might be mistaken.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#109
post #87
post #79

Earlier quoted context omitted.

HDCP (the DRM tech for HDMI) was not very well designed, and the master keys were cracked some years ago.

Which is probably fine if you're just doing it as a hobby project, but could land you in a legal pickle if you try to do anything commercial with it.

Yes, I imagine you'd run afoul of the DMCA or similar if you started trying to make money from such a thing.

Re: Ask HN: Where do I get started on ASICs, FPGA, RTL, Verilog et. al?

#110
post #4

I wouldn't get too hung up on the phrase 'IP core', it's basically the equivalent of a software library. A reusable chunk of silicon or verilog. If you want to know about how chips are made then I'd highly recommend the book "CMOS Circuit Design and Simulation" by Baker. It's starts off telling you how silicon is etched to make chips, then goes through how MOSFETs work and how to simulate them using SPICE. By the tim…

> then just a matter of fighting the Xilinx/Altera/Lattice tools until then give you a bitstream

Haha! So true :-) I have to give some credit to Altera tho because after sort of step learning curve you can start generating "IP Cores" with QSys and Tcl scripts to stop clicking on the same icons all day long!

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