Assembly Hall of Shame • Hacker News Board

Re: Assembly Hall of Shame

#101

Post by Lockal » Sat, Aug 08, 2026, 4:36 PM UTC

IshKebab wrote: post #29

Using MMIO is cheating and makes the results very boring. It would be much more interesting to know the results if you're only allowed to use main memory.

I'm not sure how to properly measure DRAM access, but for register/immediate-only instructions there is https://uops.info/table.html. It does not measure x87 transcendentals (I guess because microcode results in different performance), but CPUID is a notable mention.

Re: Assembly Hall of Shame

#102

Post by JoeAltmaier » Sat, Aug 08, 2026, 4:54 PM UTC

bonzini wrote: post #78

JoeAltmaier wrote: post #51

Earlier quoted context omitted.

There were several NOPs - XCHG BX,BX and so on. Those were taken later to be prefixes for new classes of opcodes.

None was. XCHG AX,AX is special because XCHG AX,reg has a one-byte encoding. You're probably confusing with: - POP CS being broken and later becoming a prefix - some opcodes being "reserved NOPs", i.e. reserved without generating #UD. They are used for instructions that may be defined in the future while guaranteeing backwards compatibility, for example new kinds of prefetches. MPX bounds checking instructions were a…

Was I thinking of 0x86?

Re: Assembly Hall of Shame

#103

Post by trebligdivad » Sat, Aug 08, 2026, 5:58 PM UTC

Retr0id wrote: post #15

Related, and linked in the readme: https://github.com/xoreaxeaxeax/smiiiiiiiiiiiiiiii (using the slow instructions to break SMI)

Yeh that's a really nice one; I don't see anything in that suggesting it's been fixed (or even reported?)

Re: Assembly Hall of Shame

#104

Post by bonzini » Sat, Aug 08, 2026, 6:54 PM UTC

JoeAltmaier wrote: post #102

bonzini wrote: post #78

Earlier quoted context omitted.

None was. XCHG AX,AX is special because XCHG AX,reg has a one-byte encoding. You're probably confusing with: - POP CS being broken and later becoming a prefix - some opcodes being "reserved NOPs", i.e. reserved without generating #UD. They are used for instructions that may be defined in the future while guaranteeing backwards compatibility, for example new kinds of prefetches. MPX bounds checking instructions were a…

Was I thinking of 0x86?

0x86 and 0x87 (XCHG rm,r with byte- and word-sized operands) encode nops in the same way as 0x90, but were never redefined as prefixes.

It's interesting that a lot of ALU operations occupy four opcodes (memory source/memory destination x byte/word) but 0x84/0x85 and 0x86/0x87 only need two because not only are they commutative, but also 0x84/0x85 do not write to any operands and 0x86/0x87 write to both. So there is no difference between memory as the source or destination operand.